Other Parts Discussed in Thread: SN65HVS882, SYSCONFIG, , TMDSEVM572X
I want to communicate with SPI devices in uboot, but SPI is dead-loop in spi_reset of the omap3_spi.c.
The MCSPI_SYSSTATUS register of SPI is always 0, indicating Internal module reset is ongoing.
My changes are as follows:
(1)dra7.dtsi:
aliases {
spi0 = &qspi;
++spi1 = &mcspi1;
++spi2 = &mcspi2;
++spi3 = &mcspi3;
++spi4 = &mcspi4;
}
(2)am57xx-beagle-x15-common.dtsi add:
&mcspi2 {
status = "okay";
ti,pindir-d0-out-d1-in;
sn65hvs882: sn65hvs882@0 {
compatible = "pisosr-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0>;
spi-max-frequency = <1000000>;
spi-cpol;
};
};
(3) u-boot-2018.01/board/ti/am57xx/mux_data.h
const struct pad_conf_entry core_padconf_array_essential_x15[] = {
{SPI2_SCLK, (M0 | PIN_INPUT_PULLDOWN)},
{SPI2_D1, (M0 | PIN_INPUT_PULLDOWN)},
{SPI2_D0, (M0 | PIN_INPUT_PULLDOWN)},
{SPI2_CS0, (M0 | PIN_OUTPUT_PULLUP)},
}
After compiling, put the u-boot.img amd MLO into emmc and start it.
Execute the sspi 2:0 8 command under uboot.Will loop endlessly in spi_reset in omap3_spi.c.
The spi_reset function will reset the spi and query the state, but the state is always 0. In the manual, a state of 0 means that the reset is ongoing.
static void spi_reset(struct mcspi *regs)
{
unsigned int tmp;
writel(OMAP3_MCSPI_SYSCONFIG_SOFTRESET, ®s->sysconfig);
do {
tmp = readl(®s->sysstatus);
} while (!(tmp & OMAP3_MCSPI_SYSSTATUS_RESETDONE));
writel(OMAP3_MCSPI_SYSCONFIG_AUTOIDLE |
OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP |
OMAP3_MCSPI_SYSCONFIG_SMARTIDLE, ®s->sysconfig);
writel(OMAP3_MCSPI_WAKEUPENABLE_WKEN, ®s->wakeupenable);
}
I'd like to ask where the question might appear.