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Part Number: AM1806
There is the description about clearance for signals on chapter3 (page10) in http://www.ti.com/lit/an/spraar7h/spraar7h.pdf.
I'd like to know about clearance for GND pattern also.
Not sure what do you mean by gnd clearance.. if you take a look at Table2. Example PCB Stackups in the same document, you can see they are on different layers. Also the rules for differential signals say: "When possible, route high-speed differential pair signals on the top or bottom layer of the PCB with an adjacent GND layer."
Best Regards, Yordan
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In reply to Yordan Kovachev:
Thank you very much for replying to my question.
My question is,,, about PCB design of the GND signal on GND layer, how many space is required between each GND signals?
In reply to HaTa:
The GND layer is a whole layer, there shouldn't be gnd signal traces (in my experience this is highly not recommended), if that is what you mean. Also you should keep cut-up through gnd layer to a minimum (see for example this guide: Figure 5. Layout Considerations for an example how a gnd plane should loo like. NOTE: for multi-layer pcb design gnd is a layer).
Also you should separate digital & analog gnd planes if you use only one layer. But again the layers should not be cut through with buried signal traces.
I have one more question.
How many space is needed between USB data line (D+/D-) and ground pattern placed on the same layer for the purpose of shielding the signal.
I prefer 50mils if possible, but sometimes that amount of space is not available. A reasonable rule-of-thumb is 2s min where ‘s’ is the center-to-center spacing for the differential traces. If you go below the 2s min limit, the ground plane will affect your characteristic impedance.
In reply to -DK-:
At the following case, does "2s" equal 6mils x2 (i.e. 12mils)?
No, in this case it would be 14mils. 8 + ((6*0.5)*2).
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