DRA787: How to config non-cache share memory

Hi,

Are you taking care of this in MMU configuration for IPU.

Make sure your share memory falls under non- cacheable page.

Regards,

Anuj

Hi Anuj

How to check whether share memory falls under non- cacheable page?

Thanks!

Hi,

Please check the MMU configuration

Check below file for all page allocation

\vision_sdk\links_fw\src\rtos\bios_app_common\tda2ex\ipu1_0\Ammu1_bios.cfg

Regards,

Anuj

Hi

We not use vision SDK, we create a CCS project.

Memory map config as following

var SR_0 = {
name: "SR_0", space: "data", access: "RWX",
base: 0x8E000000, len: 0x1000000,
comment: "SR#0 Memory (16 MB)"
};

var Ecarx_log= {
name: "Ecarx_log", space: "data", access: "RWX",
base: 0x87000000, len: 0x200000,
comment: "Ecarx_log Memory (2 MB)"
};
memcount=0;
var memory = []

memory[memcount++]=["L2_RAM",
{
base: 0x20000000,
space: "code/data",
name: "L2_RAM",
len: 0x00010000,
access: "RWX",
}
];
memcount++;

memory[memcount++]=["OCMC_RAM",
{
base: 0x40300000,
space: "code/data",
name: "OCMC_RAM",
len: 0x00080000,
access: "RWX",
}
];
memcount++;

memory[memcount++]=["EXT_RAM",
{
base: 0x80000000,
space: "code/data",
name: "EXT_RAM",
len: 0x06000000,
access: "RWX",
}
];
memcount++;

memory[memcount++]=["IPU1_0_PROG",
{
base: 0x86000000,
space: "code/data",
name: "IPU1_0_PROG",
len: 0x1000000,
access: "RWX",
}
];
memcount++;

memory[memcount++]=["SR_0", SR_0 ];
memcount++;

memory[memcount++]=["Ecarx_log", Ecarx_log ];
memcount++;

Build.platformTable["ti.platforms.evmTDA3XX:dsp1"] = {
externalMemoryMap: [
[ "DSP1_PROG", {
name: "DSP1_PROG", space: "code/data", access: "RWX",
base: 0x8C000000, len: 0x1000000,
comment: "DSP1 Program Memory (16 MB)"
}],
/* [ "DSP1_PROG", {
name: "DSP1_PROG", space: "code/data", access: "RWX",
base: 0x83200000, len: 0x1000000,
comment: "DSP1 Program Memory (16 MB)"
}],*/
[ "SR_0", SR_0 ],
[ "Ecarx_log", Ecarx_log ]
],
codeMemory: "DSP1_PROG",
dataMemory: "DSP1_PROG",
stackMemory: "DSP1_PROG",
l1DMode: "32k",
l1PMode: "32k",
l2Mode: "128k"
};

Build.platformTable["ti.platforms.evmTDA3XX:dsp2"] = {
externalMemoryMap: [
[ "DSP2_PROG", {
name: "DSP2_PROG", space: "code/data", access: "RWX",
base: 0x8D000000, len: 0x1000000,
comment: "DSP2 Program Memory (16 MB)"
}],
/* [ "DSP2_PROG", {
name: "DSP2_PROG", space: "code/data", access: "RWX",
base: 0x86400000, len: 0x1000000,
comment: "DSP2 Program Memory (16 MB)"
}],*/
[ "SR_0", SR_0 ],
[ "Ecarx_log", Ecarx_log ]
],
codeMemory: "DSP2_PROG",
dataMemory: "DSP2_PROG",
stackMemory: "DSP2_PROG",
l1DMode: "32k",
l1PMode: "32k",
l2Mode: "128k"
};

Build.platformTable["ti.platforms.evmTDA3XX:eve1"] = {
customMemoryMap: memory,
externalMemoryMap: [
[ "EVEVECS", { /* name used by SYS/BIOS */
name: "EVEVECS", space: "code/data", access: "RWX",
base: 0x80000000, len: 0x1000, page: 0,
comment: "EVE1 Vector Table (4 KB)"
}],
[ "EVE1_PROG", {
name: "EVE1_PROG", space: "code/data", access: "RWX",
base: 0x80001000, len: 0x3FF000, page: 1,
comment: "EVE1 Program Memory (~4 MB)"
}],
[ "SR_0", SR_0 ],
[ "Ecarx_log", Ecarx_log ]
],
codeMemory: "EVE1_PROG",
// dataMemory: "DMEM",
dataMemory: "EVE1_PROG",
// stackMemory: "DMEM"
stackMemory: "EVE1_PROG"
};

Build.platformTable["ti.platforms.evmTDA3XX:ipu1"] = {
externalMemoryMap: [
[ "IPU1_PROG", {
name: "IPU1_PROG", space: "code/data", access: "RWX",
base: 0x86000000, len: 0x1000000,
comment: "IPU1 Program Memory (16 MB)"
}],
/* [ "IPU1_PROG", {
name: "IPU1_PROG", space: "code/data", access: "RWX",
base: 0x8C800000, len: 0x1000000,
comment: "IPU1 Program Memory (16 MB)"
}],*/
[ "SR_0", SR_0 ],
[ "Ecarx_log", Ecarx_log ]
],
codeMemory: "IPU1_PROG",
dataMemory: "IPU1_PROG",
stackMemory: "IPU1_PROG"
};

var ipu1_ammu = {
prog: { /* program memory */
pa: 0x86000000,
size: "Large_32M",
cache: "CachePolicy_CACHEABLE"
},
sr0: { /* SR_0 data memory (non-cacheable) */
pa: 0x8E000000,
size: "Large_32M",
cache: "CachePolicy_NON_CACHEABLE"
},
ecarx_log: { /* ecarx_log data memory (non-cacheable) */
pa: 0x87000000,
size: "Large_32M",
cache: "CachePolicy_NON_CACHEABLE"
}
};

Build.platformTable["ti.platforms.evmTDA3XX:ipu1-0"] = {
customMemoryMap: memory,
externalMemoryMap: [
[ "IPU1_0_PROG", {
name: "IPU1_0_PROG", space: "code/data", access: "RWX",
base: 0x86000000, len: 0x800000,
comment: "IPU1-0 Program Memory (8 MB)"
}],
[ "SR_0", SR_0 ],
[ "Ecarx_log", Ecarx_log ]
],
codeMemory: "IPU1_0_PROG",
dataMemory: "IPU1_0_PROG",
stackMemory: "IPU1_0_PROG"
};

var ipu1_0_ammu = {
prog: { /* program memory */
pa: 0x86000000,
size: "Large_32M",
cache: "CachePolicy_CACHEABLE"
},
sr0: { /* SR_0 data memory (non-cacheable) */
pa: 0x8E000000,
size: "Large_32M",
cache: "CachePolicy_NON_CACHEABLE"
},
ecarx_log: { /* ecarx_log data memory (non-cacheable) */
pa: 0x87000000,
size: "Large_32M",
cache: "CachePolicy_NON_CACHEABLE"
}
};

Build.platformTable["ti.platforms.evmTDA3XX:ipu1-1"] = {
externalMemoryMap: [
[ "IPU1_1_PROG", {
name: "IPU1_1_PROG", space: "code/data", access: "RWX",
base: 0x86800000, len: 0x800000,
comment: "IPU1-1 Program Memory (8 MB)"
}],
[ "SR_0", SR_0 ],
[ "Ecarx_log", Ecarx_log ]
],
codeMemory: "IPU1_1_PROG",
dataMemory: "IPU1_1_PROG",
stackMemory: "IPU1_1_PROG"
};

/*
* ======== ti.targets.elf.C66 ========
*/
var C66 = xdc.useModule('ti.targets.elf.C66');
C66.ccOpts.suffix += " -mi10 -mo -pdr -pden -pds=238 -pds=880 -pds1110 ";
Build.targets.$add(C66);

Hi,

as Anuj is out of office I will ping other VisionSDK experts to help, they will reply here soon.

Regards,

Yordan