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Original question:

C6745 External SDRAM

CCS/TMS320C6745: How to enable SDRAM in TMS320C6745

maanu palthiya
Prodigy 80 points
Part Number: TMS320C6745


Tool/software: Code Composer Studio

Hi,

I want to use SDRAM for my code as L1 cache not sufficient for my code. So i want to make use of SDRAM for this purpose. So how do we enable SDRAM for this. Do we need to change only .cmd file of C6745 or anything else we need to change ????

  • 0
    TI__Guru** 116740 points

    Hi Maanu,

    In addition to L1 cache, the device also has 256 Kb of L2 which can also be configured SRAM for general purpose usage and 128 KB shared RAM (onchip).

    If your application needs more memory then you can use SDRAM (external memory) by connecting it to EMIFB. In order to configure and use SDRAM, you need to configure the SDRAM timing and other EMIF registers to configure the memory controller and then use the 256MB memory region from 0xC0000000.

    For reference you can look at the Hardware resource guide here:

    http://wiki.tiprocessors.com/index.php/OMAP-L137_Hardware_Design_Guide

    We provide a reference GEL file for the EVM in CCS that shows how the SDRAM is initialized. GEL is located at <CCS_INSTALL_PATH>\ccs_base\emulation\boards\evmc6747\gel\evmc6747_dsp.gel

    At the time of boot, AISGEn tools allows you to provide EMIFB configuration to setup SDRAM and load the application to that region. 

    NOTE: For older silicon and for SDRAM testing, you can access diagnostic tests here:

    http://processors.wiki.ti.com/index.php/OMAPL137,_AM17x,_C6747/5/3,_DA83x/2x/1x/0x_IO_Buffer_Premature_Aging_Assessment

    From SW development perspective once EMIFB/SDRAMThe linker command file below, shows all available regions, you can refer to the linker command file attached here:

    linker.zip

    Regards,

    Rahul