EVMK2GX: EVMK2GX clock down to 600MHz

Hi,
Are they running linux or RTOS? In linux you could try the cpufreq entries in user space: 
  

If they use RTOS, they could try and tweak the PLL settings (see Section 5.4 Clock Management in the TRM and CTT tool).

Best Regards,
Yordan

Hitoshi-san,

For the K2G EVM platform, the early version of the production EVM was created using 600 Mhz variant of the K2G02 silicon and then upgraded to K2G12. Can you please confirm the revision of the EVM that you are using so we can confirm that there is a need to safely lower the clocks.

The ARM and SYS PLL of this device is programmed in both RTOS and Linux software based on the setting read in the DEVSPEED register so there is control code in the ROM, GEL, board library and in uboot code that read the JTAGID and sets the PLL accordingly. Please locate the following code in GEL located in the files here: (C:\ti\ccsv8\ccs_base\emulation\boards\evmk2g\gel)

if (( devSpeed == 1000) && (armSpeed == 1000))
		{
            /* This is 1000MHz chip */
			CORE_PLL_INIT_24MHz_to_1000MHz();
			TETRIS_PLL_INIT_24MHZ_to_1000MHz();
			
        }
		else if ((devSpeed == 600) && (armSpeed == 600))
		{	
			/* This is 600MHz chip */
			CORE_PLL_INIT_24MHz_to_600MHz(); 
			TETRIS_PLL_INIT_24MHZ_to_600MHz();
        }

In the RTOS software, you can see the same setting in file evmK2G.c which is located at pdk_k2g_1_0_xx\packages\ti\board\src\evmK2G\evmK2G.c 

    if (cfg & BOARD_INIT_PLL)
	{
		var= Board_getDEVSPEED();
        if(var == DEVSPEED1G)
        {
			ret = Board_PLLInit_1G(); //Set SOC to 1Ghz settings.
        }
        else if(var == DEVSPEED600)
        {
			ret = Board_PLLInit();  // Set SOC to 600 Mhz settings
        }
		else
			return BOARD_UNSUPPORTED_FEATURE;
    }

For Uboot (Linux bootloader),  you can look for the path here referred in the link below:

https://patchwork.ozlabs.org/patch/851525/

Please note that the above changes don`t change the core voltage CVDD so while the clocks are lowered the CVDD will be still set to higher 1 V. For 600 Mhz silicon CVDD of 0.9 V (setting on older EVM) should suffice and will result in lower power consumption. 

Hope this clarifies how to go to slower speed 

Regards,

Rahul