This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Part Number: DRA72XEVM
Hi TI Forum,
We are trying to enable Reverse View Camera usecase on our custom board having TDA2xx SoC. We are using Vision SDK 3.0.7
According to the Steps as specified in VisionSDK_Linux_UserGuide.pdf - > 3.5 - Early M4 based chains for VSDK-Linux builds
enabled the EARLY_USECASE_ENABLE to "yes" in the below cfg.mk file
#Enable/Disable early use-cases (yes/no)EARLY_USECASE_ENABLE=yes
And also enabled early_capture_late_weston usecase in uc_cfg.mk file
To ensure the Reverse camera gets started early within 5-6 seconds, we are loading IPU2 core during uboot.We disabled the pheripherals used by ipu core in dts as per the document :
But with dss disabled, it leads to an error when apps.out is executed.In we enable dss in kernel the displays goes off and shows "out of range" signal.
Below is the Error message that appears after running apps.out: The usecase will not run as the execution is stuck in System_init(chains_main.)
### WARNING ###: use the following [read | write | set bit | clear bit | dump] commands at your own risk! No address check done, may generate: - bus error (invalid or not accessible <physical address>, - platform crash/hang (bad <value>).
Read any OMAP memory address (register), given its <physical address> or <name> as listed in TRM.
Write <value> at any OMAP memory address (register), given its <physical address> or <name> as listed in TRM.
Set bit at <position> into any OMAP memory address (register), given its <physical address> or <name> as listed in TRM.
Clear bit at <position> into any OMAP memory address (register), given its <physical address> or <name> as listed in TRM.
Dump a range of OMAP memory addresses, from <start address> to <end address>. Note all addresses within given range must be valid and accessible.
### WARNING ###: use the following I2C [read | write] commands at your own risk! No address check done, may generate: - I2C bus error (invalid or not accessible <physical address>, - platform crash/hang (bad <value>).
Read I2C register at address <addr> from I2C chip at <chip-addr> on I2C <bus>.
Write <value> in I2C register at address <addr> from I2C chip at <chip-addr> on I2C <bus>.
Calling System_init [HOST] OSA: MEM: 0: Mapped 0xa0100000 to 0xb6000000 of size 0x00100000 [HOST] OSA: MEM: 1: Mapped 0x84203000 to 0xa3400000 of size 0x12c00NET: Registered protocol family 41000 [HOST] OSA: MEM: 2: Mapped 0xa0200000 to 0xb620f000 of size 0x00040000 [HOST] OSA: MEM: 3: Mapped 0xa02c0000 to 0xb624f000 of size 0x00080000 [HOST] OSA: MEM: 4: Mapped 0x00000000 to 0x00000000 of size 0x00000000
This is the dts file with late attach configurations:
I dont think this is caused by enabling / disabling DSS, and it looks more like a early boot issue. Let us look at the logs and get back to you
We are glad that we were able to resolve this issue, and will now proceed to close this thread.
If you have further questions related to this thread, you may click "Ask a related question" below. The newly created question will be automatically linked to this question.
In reply to Subhajit Paul:
Can you share your dtb used for this usecase?
In reply to Ramprasad:
PFA the dtb file we are using for this scenario....!! As .dtb file attachment was not happening, I have changes the extension of dtb to .txt. So could you please change the extension to .dtb when you try opening it..
Thanks & Regards,
In reply to Sudhi Sudhi:
I regenerated dts file from dts and compared with TI's default dra-evm-infoadas.dtb(with late-attach patches applied).
I am not seeing late-attach attributes for timers, mailbox, IPU1, IPu2, and DSP2 etc.
TI has added only one usecase with EARLY_USECASE_ENABLE=yes(early_capture_lateweston) and these nodes need to be late-attached for the usecase.
Can you check once?
All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.
TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs andembedded processors, along with software, tools and the industry’s largest sales/support staff.