Hi,
my customer is trying 16-bit raw data from VIP to DDR3 on their own board using AM5716. But it doesn't do well.
They have some questions about setting VIP and VPDMA.
1. Should we use Outbound Data Transfer Descriptor and not use Inbound Data Transfer Descriptor when transferring data from VIP to DDR3?
2. What is the status register that confirms to which module of the VIP the data has come? We am trying to check the status of the following data.
- Status of input data of Slice0/1
- Status of output data of Slice0/1
- Status of input data of VPDMA
- Status of output data of VPDMA
3. VIP_INTC_INTR0_STATUS_RAW0(0x4897 0020) and VIP_INTC_INTR1_STATUS_RAW0(0x4897 0040) is 0x0010 0000.
Does this mean that data is coming to PARSER?
4. As described in Technical Reference manual 9.4.8.2.3, does this mean that if you set the stored address of the Descriptor in the VIP_LIST_ADDR register, the HW starts a DMA transaction and sets the VIP_LIST_ATTR [19] RDY bit?
>> The first MMR write to VIP_LIST_ADDR register after VPDMA reset should
>> be the address of the memory buffer(128-bit aligned, that is, last four bits
>> of the buffer address should be zero) where the firmware is stored. List
>> Manager then schedules a DMA transaction to fetch the firmware and sets
>> the VIP_LIST_ATTR[19] RDY bit after the firmware loading is complete.
5. Is it possible to transfer data to DDR3 without the Configuration Descriptor and Control Descriptor?
6. We set the below parameters in registers and Descriptor. We would appreciate if you would point out any mistakes.
Best Regards,
M.Ohhashi
