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TMS320C6672: Can the DLB-Bit be used for I2C Bus hang recovery on C667x devices or not?

Part Number: TMS320C6672

Can the DLB-Bit be used for I2C Bus hang recovery on C667x devices or not?

See also

https://e2e.ti.com/support/processors/f/791/p/480412/2149364

  • Hi,

    Sorry for the late response! After check with design team, there is some suggestion may help:

    To Unlock the bus:

    1. Ensure SDA and SCK can be controller directly:

    2. Toggle (drive low, then release) SCK for 9 cycles (for I2C mode: effectively NACK from master, returning slave to idle state – that should terminate any transaction already started)

    3. Confirm SDA is back to high. If so, bus is unlocked. Otherwise; repeat step 1-2 again, after three tries, give error condition for UNLOCK-FAILED.

    4. Send STOP condition. Now slave device should be in waiting mode.

    Regards, Eric

  • Hi Juergen,

    The DLB bit provides a digital loopback path for the I2C interface but to be useful for clearing a bus lock, the clock and data must be transmitted externally. We are checking with the design team to see if the clock signal is transmitted when the DLB bit is set but they are not currently able to provide that information.  I will post an update when they are able to gather the proper information. 

    Regards, Bill