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TMS320C6657: CIC1 EDMA Interrupt Issue

Part Number: TMS320C6657

Hello,

I'm having an issue with getting a GPIO interrupt to trigger an EDMA event transfer through the CIC.

I have mapped GPIO14 (CIC1 Event #6) to host event/interrupt CIC1_OUT0 (EDMA Event Channel 43).  When I toggle GPIO14 I see the status update in the CIC1 "System Interrupt Status Raw/Set Registers", but it doesn't trigger the appropriate bit in the Event Register High (ERH) EDMA register which I think indicates my CIC mapping is not working.  The EDMA event transfer never occurs.

I tried to follow the instructions at this webpage:
https://processors.wiki.ti.com/index.php/Configuring_Interrupts_on_Keystone_Devices

The examples at the webpage were not for EDMA interrupts though, so I wasn't sure if the dispatch calls were needed for EDMA.

My code to setup the CIC1 mapping is:

unsigned short cicNumber = 1;
unsigned short sysInt = 6;
unsigned short hostInt = 0;
CpIntc_mapSysIntToHostInt(cicNumber, sysInt, hostInt);
CpIntc_enableSysInt(cicNumber, sysInt);
CpIntc_enableHostInt(cicNumber, hostInt);

Then I pass 43 in as the channel ID to the various EDMA DRV calls.

Am I missing something in this setup code?

Thank you!
David

  • Also, I found that calling EDMA3_DRV_enableTransfer returned EDMA3_DRV_E_INVALID_PARAM due to bit 43 not being set in gblCfgParams.dmaChannelHwEvtMap.  I added code to set bit 43 just after calling edma3init( ) and that seemed to resolve the invalid param error.  However, the issue in my first post still exists (no EDMA transfer, no bits in the EDMA ERH register getting set).

  • Hi,

    You are using GPIO as an input event to trigger an EDMA transfer. Several things to check:

    1) C6657 has 32 GPIO pins corresponding to 32 GPIO interrupt. If you use one of GPIO PIN 0, 1, 2, 3 (assume they are available for simple test purpose), it serves as the EDMA input event 6, 7, 8, or 9. Do you see the EDMA transfer happening? 

    2) Do you have the EDMA EESR, EESRH register enabled for event 6, 7, 8, 9 or your event 43?

    3) How do you know the transfer doesn't happen? The destination contents weren't written? IPR, IPRH bit didn't set?

    If you have GPIO 0, 1, 2, 3 working, it means the EDMA part is correct.

    4) Then focus on the GPIO CIC1 mapping part, assuming your mapping is correct and use CPU instead of EDMA, are you able to see the GPIO 14 interrupt handled by CPU? You can enter the ISR?

    If not, then we need to look at how to map GPIO14 interrupt to CIC1_OUT0. This CIC1_OUT0 is your input event input 43 to EDMA.

    Regards, Eric 

      

  • Hi,

    Now, how to map GPIO14 (which is system interrupt 6) to CIC1_OUT0, you can refer to the below test code pdk_c665x_2_0_15\packages\ti\csl\example\cpintc\cpintc_test.c. Should be something like this:

    /**************************************************
    ************* CPINTC-1 Configuration *************
    **************************************************/

    printf ("Debug: CPINTC-1 Configuration...\n");

    /* Open the handle to the CPINT Instance */
    hnd = CSL_CPINTC_open(1);
    if (hnd == 0)
    {
    printf ("Error: Unable to open CPINT instance 1\n");
    return;
    }

    /* Disable all host interrupts. */
    CSL_CPINTC_disableAllHostInterrupt(hnd);

    /* Configure no nesting support in the CPINTC Module. */
    CSL_CPINTC_setNestingMode (hnd, CPINTC_NO_NESTING);

    /* We now map System Interrupt 5 to channel 0 */
    CSL_CPINTC_mapSystemIntrToChannel (hnd, 6 , 0);

    /* We now enable system interrupt 5 */
    CSL_CPINTC_enableSysInterrupt (hnd, 6);

    /* We enable host interrupts. */
    CSL_CPINTC_enableHostInterrupt (hnd, 0);

    /* Enable all host interrupts also. */
    CSL_CPINTC_enableAllHostInterrupt(hnd);

    printf ("Debug: CPINTC-1 Configuration Completed\n");

    Regards, Eric

  • I switched over to using the CSL calls from the example you mentioned instead of the CpIntc calls and it did not seem to make a difference.  I think I'm getting a system interrupt with either method as the CIC1 "System Interrupt Status Raw/Set Register" (CIC register offset 0x200) is set to 0x40 (event 6) with either method.

    From your first post:

    1) I tried using GPIO0 and EDMA event 6, but the call to EDMA3_DRV_requestChannel( ) returns with an error (-132 which is EDMA3_DRV_E_DMA_CHANNEL_UNAVAIL).  Looks like this occurs when the EDMA3_RM_allocResource call fails to return an expected value.

    2) I did not explicitly enable the EDMA EESR, EESRH register.  After doing some investigating, it looks like the call to EDMA3_DRV_enableTransfer enables event 43 in the shadow region 0 EESRH register (offset 0x2034).  I verified the EERH register had event 43 set.  I also set the global EESRH register to 0x800 to enable event 43 and it didn't seem to make a difference.

    3) The destination contents aren't written and my transfer completion callback function isn't called.  I also looked at the ERH registers (Global offset 0x1004 and Shadow 0 offset 0x2004) and no bits are set.  The description of the ERH register makes it sound like the event bit should be set regardless of EDMA settings if an event is received.  I also checked the IPR and IPRH registers in both Global and shadow region 0 and no bits are set.

  • For #1 above:

    • the allocateResource call was checking the RM ownDmaChannels configuration and only channels 40 through 47 are marked as owned.  I believe this is setup in edma3_lld.../.../sdo/edma3/rm/src/configs/edma3_c6657_cfg.c
    • similar issue with rmInstance->avlblDmaChannels, ownTccs, and avlblTccs

    Not sure if it is valid, but I set those four variables for GPIO0/Channel6 and all the EDMA3_DRV calls returned error free. However, none of the indicators I mentioned in #3 above showed any signs of EDMA actually getting the event interrupt.

    Assuming what I did was valid, that appears to point to something with my EDMA as the issue.  Any other ideas on why EDMA wouldn't be getting interrupts?  Are there other things I need to modify within RM?

    Thanks for the help!

  • If I use EDMA3_DRV_TRIG_MODE_MANUAL in the enableTransfer call, I'm able to get the transfer to occur.  I see the data at the destination.  However, the callback function still isn't being called which I'm assuming is related to the reason that the event transfer doesn't work.

  • Hi,

    As you mentioned earlier, the EDMA channel 6 is reserved by RM, you already found a way to enable and allocate it. If you can trigger an EDMA transfer manually and you saw the data in the destination buffer. Did you see an IPR or IPRH bit set? Did you register a callback when calling EDMA3_DRV_requestChannel API? There are some example under edma3_lld_2_12_05_xx\examples\edma3_driver\src. Can you check your callflow is similar to the example?

    Less important, mapping GPIO14 (which is system interrupt 6) to CIC1_OUT0, are you able to route this to CPU and CPU can enter the ISR? So to confirm the GPIO CIC_OUT0 is correct, the only thing is EDMA part?

    Regards, Eric

  • Hi Eric,

    Neither the Global Channel or Shadow Region 0 channel IPR or IPRH bits are set after seeing the data in the destination buffer.  I do register a callback when calling the EDMA3_DRV_requestChannel API and actually all the EDMA API calls are the same as what we had working on the C6424 with older SDK tools.

    I have compared my call flow to the example and it is very similar.  I just use a different event queue (one instead of zero) and call EDMA3_DRV_mapChToEvtQ.  I did run the example, and that called the callback function.  I'm going to try to use the same event queue and comment out the EDMA3_DRV_mapChToEvtQ in my project to make them more similar.  If that doesn't work, I'll try to move my code to the example project and see if my callback works there.  Hopefully I can narrow down where the issue exists.

    I'm not sure how to map the CIC1_OUT0 to the CPU.  According to the datasheet, there are no CIC1_OUT event inputs into the CorePac (Table 6-26).  If you could point me to how to do this, I would be willing to try it.

    Thanks!

    David

  • Correction, it turns out the IPRH bit is getting set for my event (event 43).  I wasn't waiting long enough for the entire block to get transferred.  However, the callback still isn't getting called.

  • The callback is now being called.  I had to add the following lines to the *.cfg file to map the combiner output to specific interrupts:

    ECM.eventGroupHwiNum[0] = 7;
    ECM.eventGroupHwiNum[1] = 8;
    ECM.eventGroupHwiNum[2] = 9;
    ECM.eventGroupHwiNum[3] = 10;

    I assume the EDMA API calls are mapping CIC0 to route EDMA3_CC_INT0 to the CorePac.

    I am still not able to get a GPIO event to trigger an EDMA event transfer (neither GPIO0 or GPIO14).  I can try mapping CIC1_OUT to the CPU if there is a way to do that. Otherwise, any other ideas on what I can try or look at?

    Thanks!

    David

  • Hi David,

    Good progress! 

    >>>> it turns out the IPRH bit is getting set for my event (event 43)>>>> 

    >>>>I had to add the following lines to the *.cfg >>>>

    How do you test the EDMA transfer with channel 43 and call back, you triggered the EDMA manually instead of event?Just to confirm with you.

    >>>> I can try mapping CIC1_OUT to the CPU if there is a way to do that>>>> Sorry my suggestion was wrong when I looked at the datasheet, CIC1_OUTx can't be sent to CPU.

    Are you able to use a GPIO pin (E.G 16-31) to generate an interrupt to CIC0_OUTx and test with CPU? If that works, we may assume CIC1_OUTx also work if you configure the same way (but different CIC instance, different system event number, different output number)? 

    Regards, Eric

  • Hi Eric,

    Yes, I was using the EDMA manual trigger.  I should have probably used the word channel instead of event.

    I was trying the CIC0 test when I noticed that another function during initialization was resetting some GPIO settings which was messing up the settings I had made for GPIO14.  I went back to using CIC1 and was able to get the EDMA event transfer to occur!  I haven't done a lot of testing yet, but everything appears to be working (transfer to destination and callback).

    Thank you very much for the help!

    David