DRA756: kernel&boot patch for early boot late attach @Ramprasad

hi, Ramprasad.

after patched with 0002-arm-mach-omap2-Remove-edma-related-nodes-from-hwmod-.patch, we found we have sloved the issue that the IPU1 cannot boot(previous post at https://e2e.ti.com/support/processors/f/791/p/909193/3361713 )

and the log is observed:

OMAP DMA hardware revision 0.0
omap-dma-engine 4a056000.dma-controller: OMAP DMA engine driver (LinkedList1/2/3 supported)
edma3-tptc 43400000.tptc: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
edma3-tptc 43500000.tptc: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info
edma 43300000.edma: _od_fail_runtime_resume: FIXME: missing hwmod/omap_dev info

buf mcasp  failed to config dma:

davinci-mcasp 4847c000.mcasp: DAI is shared
davinci-mcasp 4847c000.mcasp: Can't verify DMA configuration (-19)
davinci-mcasp 4847c000.mcasp: No DMA controller found (-19)
omap-hdmi-audio omap-hdmi-audio.0.auto: snd-soc-dummy-dai <-> 58040000.encoder mapping ok

i have checked the fourm, found https://e2e.ti.com/support/processors/f/791/t/827877?tisearch=e2e-sitesearch&keymatch=tptc0, but

hi, Ramprasad.

have a hard dig with the link things, i cannot find a easy way to make the both work.

adding HWMOD_INIT_NO_RESET to dra7xx_tptc0_hwmod and dra7xx_tptc1_hwmod will do the same trick  ?

/* tptc0 */
static struct omap_hwmod dra7xx_tptc0_hwmod = {
	.name		= "tptc0",
	.class		= &dra7xx_tptc_hwmod_class,
	.clkdm_name	= "l3main1_clkdm",
	.flags		= HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY | HWMOD_INIT_NO_RESET,
	.main_clk	= "l3_iclk_div",
	.prcm		= {
		.omap4	= {
			.clkctrl_offs = DRA7XX_CM_L3MAIN1_TPTC1_CLKCTRL_OFFSET,
			.context_offs = DRA7XX_RM_L3MAIN1_TPTC1_CONTEXT_OFFSET,
			.modulemode   = MODULEMODE_HWCTRL,
		},
	},
};

/* tptc1 */
static struct omap_hwmod dra7xx_tptc1_hwmod = {
	.name		= "tptc1",
	.class		= &dra7xx_tptc_hwmod_class,
	.clkdm_name	= "l3main1_clkdm",
	.flags		= HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY | HWMOD_INIT_NO_RESET,
	.main_clk	= "l3_iclk_div",
	.prcm		= {
		.omap4	= {
			.clkctrl_offs = DRA7XX_CM_L3MAIN1_TPTC2_CLKCTRL_OFFSET,
			.context_offs = DRA7XX_RM_L3MAIN1_TPTC2_CONTEXT_OFFSET,
			.modulemode   = MODULEMODE_HWCTRL,
		},
	},
};

Hi Wen,

Yes there will be for EDMA from M4 and A15.  

Try enabling only tpcc0 for A15. This has resolved the issue for a customer.

Can you try with this change ?

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 4fa2eedc71f4..58e8d47aa6cc 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -475,7 +475,7 @@
dma-requests = <64>;
#dma-cells = <2>;

- ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 0>;
+ ti,tptcs = <&edma_tptc0 0>;

/*
* memcpy is disabled, can be enabled with:

Thanks

RamPrasad

hi, RamPrasad

i have applied your patch. and remove this patch:

0002-arm-mach-omap2-Remove-edma-related-nodes-from-hwmod-.patch

and now im testing. will update you when it's done.

i have applied your patch but the test result is still failed!

i have checked on the device,but cat ti,tptcs give me nothing:

/sys/firmware/devicetree/base/ocp/edma@43300000 # cat ti,tptcs
/sys/firmware/devicetree/base/ocp/edma@43300000 #

when i decode the dtb file, i found:

                edma@43300000 {
                        compatible = "ti,edma3-tpcc";
                        ti,hwmods = "tpcc";
                        reg = <0x43300000 0x100000>;
                        reg-names = "edma3_cc";
                        interrupts = <0x0 0x169 0x4 0x0 0x168 0x4 0x0 0x167 0x4>;
                        interrupt-names = "edma3_ccint", "emda3_mperr", "edma3_ccerrint";
                        dma-requests = <0x20>;
                        #dma-cells = <0x2>;
                        ti,tptcs = <0xad 0x0>;
               }

so i assume it's patched for sure.

hi, Ramprasad.

any updates?

Thanks

wen

Hi Wen,

You need to apply the patch 

0002-arm-mach-omap2-Remove-edma-related-nodes-from-hwmod-.patch

and then have only tpcc0 patch in dts.

Can you please try with this change?

Thanks

Ram

hi, Ram

the mcasp is not going to work with your recommendation:

[ 0.708614] davinci-mcasp 4847c000.mcasp: DAI is shared
[ 0.708697] davinci-mcasp 4847c000.mcasp: Can't verify DMA configuration (-19)
[ 0.708707] davinci-mcasp 4847c000.mcasp: No DMA controller found (-19)

if i removed 

hi, Ramprasad.

any updates?

Thanks

wen

hi, Ramprasad.

im tring to disable edma in mcasp:

.config:1888:# CONFIG_SND_EDMA_SOC is not set

but i got the same error, after looking into the code, i found edma canot be disable without hacking the code.

how can i use PCM_SDMA instead of edma ?? is there any patch for this?

Thanks

wen

HI Wen,

Please refer the answers from Peter Li.

https://e2e.ti.com/support/processors/f/791/t/912121

Thanks

Ram

hi, Ramprasad.

i have applied the patch and check the device tree in the system:

/sys/firmware/devicetree/base/ocp/edma@43300000 # ls
#dma-cells dma-requests interrupts name reg ti,hwmods ti,no-reset-on-init
compatible interrupt-names linux,phandle phandle reg-names ti,no-idle-on-init ti,tptcs

/sys/firmware/devicetree/base/ocp/tptc@43400000 # ls
compatible interrupt-names interrupts linux,phandle name phandle reg ti,hwmods ti,no-idle-on-init ti,no-reset-on-init

/sys/firmware/devicetree/base/ocp/tptc@43500000 # ls
compatible interrupt-names interrupts linux,phandle name phandle reg ti,hwmods ti,no-idle-on-init ti,no-reset-on-init

but sadly, the test result is failed.

Thanks

wen

hi, Ramprasad.

After a long time test with 4 patches from:

1 patch from fanok, wich is edma channels.

2 patches from Peter Li79, which are uboot and dts.

1 patch is from dts:

ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 0>;

to 

ti,tptcs = <&edma_tptc0 0>;

test case with yuv from capture which is running in IPU1 is ok.

but test case with h264 from encode is still failed. this situation appear even when the first test case is passed(test case with yuv from capture).

i have a few question regarding to this issue:

1. patches for Early boot late attach on uboot:

i found  https://e2e.ti.com/support/processors/f/791/t/889820?tisearch=e2e-sitesearch&amp;keymatch=early%2525252520boot

is used for PSDKLA. i have checked with our visionsdk 3.2, but not found the directory:

ti_components/os_tools/linux/kernel/linux-kernel-addon/earlyboot-lateattach-patches/u-boot. the patches for kernel is there however.

2. there maybe still hw-resource conflict:

        maybe we have slove the EMDA-conflict, maybe not.

        maybe there are resource which need by iva that we have not yet paied attention except EDMA resource.

thinks and regards, wen.

hi, Ramprasad.

i have read this post which has patches for ipus:

would this work for visionsdk ??

hi, Ramprasad.

i happened to read this post, and found what in edma3_lld_2_12_04_28\packages\ti\sdo\edma3\rm\src\configs\edma3_tda2xx_cfg.c:

/* Resources owned/reserved by region 4 (Associated to any IPU1 core 0)*/
{
/* ownPaRAMSets */
/* 31 0 63 32 95 64 127 96 */
{0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
/* 159 128 191 160 223 192 255 224 */
0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
/* 287 256 319 288 351 320 383 352 */
0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU,
/* 415 384 447 416 479 448 511 480 */
0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU, 0xFFFFFFFFU},

/* ownDmaChannels */
/* 31 0 63 32 */
{0xFFFFFFFFU, 0xFFFFFFFFU},

/* ownQdmaChannels */
/* 31 0 */
{0x000000FFU},

/* ownTccs */
/* 31 0 63 32 */
{0xFFFFFFFFU, 0xFFFFFFFFU},

/* resvdPaRAMSets */
/* 31 0 63 32 95 64 127 96 */
{0x00000000U, 0x00000000U, 0x00000000U, 0x00000000U,
/* 159 128 191 160 223 192 255 224 */
0x00000000U, 0x00000000U, 0x00000000U, 0x00000000U,
/* 287 256 319 288 351 320 383 352 */
0x00000000U, 0x00000000U, 0x00000000U, 0x00000000U,
/* 415 384 447 416 479 448 511 480 */
0x00000000U, 0x00000000U, 0x00000000U, 0x00000000U},

/* resvdDmaChannels */
/* 31 0 63 32 */
{EDMA3_DMA_CHANNEL_TO_EVENT_MAPPING_0_SYSTEDMA, EDMA3_DMA_CHANNEL_TO_EVENT_MAPPING_1_SYSTEDMA},

/* resvdQdmaChannels */
/* 31 0 */
{0x00U},

/* resvdTccs */
/* 31 0 63 32 */
{0x00U, 0x00U},
},

this told me the ipu1 is going to use all the tc / Qdma / channels, am i right??? if so, how can i modify it that the ipu &dsp can just use the last 32 channels??

hi Gaviraju