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Original question:

PRU-ICSS-INDUSTRIAL-SW: Flow of data from application to MII ports via emac driver

PRU-ICSS-INDUSTRIAL-SW: Checksum offload support in ICSS-G DUAL EMAC firmware

Debarun Roychowdhury
Intellectual 650 points
Part Number: PRU-ICSS-INDUSTRIAL-SW

Hi,

  As discussed in the thread https://e2e.ti.com/support/processors/f/791/p/906923/3365944#3365944 , currently checksum offload is not supported by dual emac firmare, but it was mentioned,"We do have updated firmware with the SR 2.0 silicon as well, so while the driver sample code was mentioned to have been tested with the SR 1.0 firmware as referenced, the SR2.0 firmware will be used for the final silicon.". Could you please let me know whether this updated version of the firmware supports checksum offload?

 And is there any release forecast of this updated firmware?

 Thanking you in advance.

Best Regards,

Debarun

  • 0
    TI__Genius 14680 points

    Debarun,

    SR2.0 support is included with the SDK 6.3 Processor SDK RTOS release (not with the 6.3 SDK Linux release). There is an upcoming SDK version at the end of June for which we support SR2.0 in both packages.

    The reference on SR1.0 is relative to the driver test application you were referencing, not to the firmware itself, however the specific example was used with SR1.0 firmware.

    We are not currently supporting checksum offload in the ICSSG firmware and I do not have a schedule for this at this time.

    Best regards,

    Dave