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Part Number: DRA829V
We find SGMII SPEC Rev1.8, then it shows SGMII terminal scheme should be LVDS.bbs.bzxzk.net/attachment.php
We wants to know DRA829V SERDES output terminal scheme. is it LVDS or CML when it used for SGMII?there is no description in DM or TRM.Customer wants to connect to external switch, such as marvell 88Q1111. its SPEC said "the 1.25G SERDES I/Os are current mode logic (CML) buffers.
Thanks a lot!yong
For TX path:
- Use 100 Ohm differential termination, located near the LVDS device. (Note this could be included in the terminating peripheral).
- Use AC coupling caps (e.g., 4.7nF) (4.7nF is mentioned because that value is used by PCIe Gen1, which runs at about the same frequency.)
- Inputs on SoC have the 100 Ohm differential RX termination present, so it is not needed on the board.
- AC couple the RX path (same value as in TX path).
You will need to review Marvell datasheet to determine if anything required on the PHY side of the AC coupling capacitors.
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In reply to Robert Eschler:
understood. Thanks for your quick reply!
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