AM3352: U-boot data abort

O.H

Part Number: AM3352

Hi experts,

My customer is using U-Boot 2019.01 of ti-processor-sdk-linux-am335x-evm -6.03.0.106 and a data abort error has occurred.

They tried to deal with RTC referring to the thread below, but it caused data abort again and reset CPU. Other boards designed with the same circuit configuration may operate normally.
e2e.ti.com/.../886505

On the board where the data abort occurs, the contents of the address of the register (0x44e3e000) of RTC cannot be read from CCS.
(From the CCS Memory Browser, it says "?????".)
The contents of the register can be checked on a board that operates normally.

Q1:Could you tell me the condition that the register of RTC cannot be referred from the Memory Browser of CCS?

Q2:Also, could you tell me what they should check to determine the cause of this data abort error?

~~~~~~~~~~~~~Data abort log contents are shown below~~~~~~~~~~~

<ethaddr> not set. Validating first E-fuse MAC
Net:   Could not get PHY for ethernet@4a100000: addr 0
eth0: ethernet@4a100000
Warning: usb_ether MAC addresses don't match:
Address in ROM is          de:ad:be:ef:00:01
Address in environment is  28:ec:9a:f4:a4:41
, eth1: usb_ether
data abort
pc : [<bff83dc4>]          lr : [<bff75d17>]
reloc pc : [<8081cdc4>]    lr : [<8080ed17>]
sp : bdf38868  ip : bdf387c0     fp : 80800020
r10: 00000017  r9 : bdf46eb8     r8 : 81fffee0
r7 : bffcba9c  r6 : bffcba04     r5 : bffcbaa0  r4 : 3f767000
r3 : 44e3e000  r2 : b0010000     r1 : bffcbacc  r0 : 00000000
Flags: nZcv  IRQs off  FIQs on  Mode SVC_32
Code: 44e3e000 83e70b13 95a4f1e0 4a064b05 (ba006e98)
Resetting CPU ...

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Best Regards,
O.H

over 3 years ago

0 Andreas Dannenberg over 3 years ago

TI__Guru 50871 points

O.H.,

O.H said:
Q1:Could you tell me the condition that the register of RTC cannot be referred from the Memory Browser of CCS?

That can happen when a peripheral module isn't being clocked or enabled.

O.H said:
Q2:Also, could you tell me what they should check to determine the cause of this data abort error?

The error signature pretty much looks like in the other thread that you pointed out. Seems like there are still accesses to the RTC peripheral registers, likely caused by the boot count mechanism. Can you please double-check that it is deactivated? Also see here: https://e2e.ti.com/support/processors/f/791/p/886505/3279072#3279072

Regards, Andreas

0 Andreas Dannenberg over 3 years ago in reply to Andreas Dannenberg

TI__Guru 50871 points

Also just to add some more background, you can find the offending address related to the default bootcount mechanism defined here:

https://git.ti.com/cgit/processor-sdk/processor-sdk-u-boot/tree/drivers/bootcount/Kconfig?h=processor-sdk-u-boot-2019.01#n151

config SYS_BOOTCOUNT_ADDR
	hex "RAM address used for reading and writing the boot counter"
	default 0x44E3E000 if BOOTCOUNT_AM33XX
	default 0xE0115FF8 if ARCH_LS1043A || ARCH_LS1021A
	depends on BOOTCOUNT_AM33XX || BOOTCOUNT_GENERIC || BOOTCOUNT_EXT || \
		   BOOTCOUNT_I2C
	help
	  Set the address used for reading and writing the boot counter.

Try switching over to the CONFIG_BOOTCOUNT_RAM mechanism as part of CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC to avoid CONFIG_SYS_BOOTCOUNT_ADDR getting accessed (and the data abort getting thrown). Best way to do that is really 'make [...] menuconfig' to ensure you are observing all your Kconfig dependencies.

Regards, Andreas

0 O.H over 3 years ago in reply to Andreas Dannenberg

Genius 5350 points

Hi Andreas,

I am sorry for the late reply.

>That can happen when a peripheral module isn't being clocked or enabled.
I understood!

・Verify again that the RTC peripherals are disabled.
・Change to CONFIG _ BOOTCOUNT _ RAM mechanism.
I will ask the customer about the above 2 items.

Thank you for your kind and detailed support.
If I have additional questions, I will create another thread.

Best Regards,
O.H

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AM3352: U-boot data abort