Compiler/TMS320C6678: What is the best DSP that supports Multi-core processing (preferably supporting OpenMP API) and Double...
Part Number: TMS320C6678
Tool/software: TI C/C++ Compiler
What is the cache line size of a TMS320C6678 ?
I just need to that to avoid false sharing when using OpenMP .... (one array being updated by multiple threads although each thread updates a different element of the array, however, since the cache lines is loaded/unloaded after each element update, there is chance for dirty read/write).
I found the below from DSP Cache User Guide ... saying that it is a 32-bye cache line...
Any comment is much appreciate it. Please let me know if this is the right value ...
For C6678 cache line size:
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