Dear Processor Forum Team;
I am designing a PCB for TI OMAP-L138B SOC. I want to ask about the maximum allowable traces distance on PCB between emulation header and OMAP-L138B IC?
SPRU641; Page 10; Section 7.1:
If the distance between the emulation header and the JTAG target device is greater than 6 inches, the emulation signals must be buffered. If the distance is less than 6 inches, no buffering is necessary.
SPRU655I Emulation and Trace Headers; Page 22; Section 9:
All routing distances from the device pins to the emulation header must be less than 3 inches.
I want to know what is maximum allowable (safe) trace distance on PCB between Emulator header and the Microprocessor? Moreover, I would like to know that I want to keep large distance (more than 6 inches) between emulator header and the microprocessor, which buffer IC should I use then? Also please tell me where should I place these buffer ICs, whether near to the microprocessor or in the middle of the traces?
Best regards, Imran Ali