This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320C6747: Query on DSP TMS320C6747 power up sequence

Part Number: TMS320C6747

Sir,

I have used TPS65023RSBT power management IC to give power, reset and power sequence for TMS320C6747 IC.

As per 6747 datasheet, dsp requires power up and power down sequencing (Section 6.3.1 and 6.3.2 of dsp datasheet).
I have prepared PMIC schematics similar to EVML137 board schematic. But this schematic will not maintain power on / off sequencing as mentioned in datasheet.Please clarify me if power sequencing is requirred as per data sheet or as per EVML137 schematic .

In my schematic I have given optional provision of sequencing 1.2V first and 3.3V, 1.8V later using PWR_Fail pin of PMIC. I am not using any RTC. Only CVDD and DVDD of DSP. Please check whether this circuit fulfills sequencing requirement of dsp.

For Power OFF, I have not given any sequencing. Power OFF is like 5V input is not available at PMIC. Is it ok? 

  • Jagdish Patange said:
    As per 6747 datasheet, dsp requires power up and power down sequencing (Section 6.3.1 and 6.3.2 of dsp datasheet).
    I have prepared PMIC schematics similar to EVML137 board schematic. But this schematic will not maintain power on / off sequencing as mentioned in datasheet.Please clarify me if power sequencing is requirred as per data sheet or as per EVML137 schematic .

    Please follow the datasheet power sequencing requirements.  

    Jagdish Patange said:
    In my schematic I have given optional provision of sequencing 1.2V first and 3.3V, 1.8V later using PWR_Fail pin of PMIC. I am not using any RTC. Only CVDD and DVDD of DSP. Please check whether this circuit fulfills sequencing requirement of dsp.

    Again, the datasheet sequencing is the requirement.  Core logic (CVDD, RVDD, and other 1.2v supplies) need to come up first then the IO rails.  Need to make sure the 3.3V digital IO and Analog PHY supplies are powered on only after the core logic supplies are up.  

    Jagdish Patange said:
    For Power OFF, I have not given any sequencing. Power OFF is like 5V input is not available at PMIC. Is it ok? 

    No sequence requirements for power off, just make sure the 3.3V supplies are not on when the other supplies are off.