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66AK2G12: Clock generation of CHIP_CLK1 by PLL controller

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Replies: 3

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Part Number: 66AK2G12

CHIP_CLK1 is used for many clocks (GPMC_FCLK = CHIP_CLK1/3, EMIF_DDR = CHIP_CLK1/2 and so on).

How is the CHIP_CLK1 derived by PLL controller ?

There is no dscription of CHIP_CLK1 in the Figure 5-166. MAIN PLL and PLL Controller and Figure 5-167. PLL and PLL Controller Generic Block Diagram of Technical Reference Manual.

Where can I learn it?

3 Replies

  • Hi,

    The best method for understanding the clocking in the 66AK2G12 is to use the clock tree tool available on TI.com.

    https://www.ti.com/tool/CLOCKTREETOOL

    Regards, Bill

    If you need more help, please reply back. If your question is answered, please click  Verify Answer 

  • In reply to Bill Taboada:

    Hi thank you for the information.

    I'm using the tool now, but Not going well regarding Save / Load Source Clocks.

    When I saved source clocks, the saved txt file is 0 kB and the contents are empty.

    And if I load the save txt file, I get an error message "ERROR : UNKNOWN DEVICE TYPE OF FILE."

    (Regarding Save / Load registers, there is no problem.)

    What should I do?

    Thanks.

  • In reply to user3788809:

    Hello,

    Could you please try using Java JRE v1.8? While the CTT user manual does state "Java JRE 1.8 or higher," we suspect there maybe something breaking compatibility with later JRE versions. The CTT was validated using v1.8 so I recommend trying this version in the meantime as a potential workaround. 

    Please also try running the CTT as an Administrator if possible, and make sure you have write privileges to the save directory.

    Regards,
    Sahin


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