AM4376: The behavior of CPSW with respect to broadcast storms and flow control

Hi,

Can anyone comment on this Issue?
Need more information to comment?

Best Regards,
H.U

Hi,

These questions have driver dependencies of the OS being used. Are these issues related to a TI Linux or RTOS driver? Please indicate the software that is being used here.

Q1: Can the Buffer Pointer of the CPDMA receive descriptor in CPSW be assigned to MPU_RAM(0x402F_0000 - 0x402F_FFFF)?

Yes you can use this region of memory as long as both the RX descriptors and the RX buffers are defined in this memory region. Please note that there are 2 blocks of internal SRAM, the range you specified must be modified, only 402F_0400 - 0x402F_FFFF is available, the first 400H bytes are reserved. Depending on the OS the memory above 402F_0400 in this block is typically used by an OS to store its internal variables. The second region is located just after the one you mentioned 0x4030_0000 0x4030_FFFF.  I would not recommend using this region for rx buffers, only about 20 or so buffers would fit. Unless the traffic is already limited a couple of small packet bursts would consume all of the buffers.

Q2: The Broadcast Storm seems to occur when PORT1 and PORT2 are connected to the same hub.

I will need more information to be able to answer this question. This is OS dependent, how the ports are configured dual mac or switch? What type of traffic. Please provide a block diagram that shows the traffic paths. How is this being tested? Is an actual hub or switch being used?

Q3: Even if P2_FLOW_EN and P1_FLOW_EN of CPSW_SS_FLOW_CTRL are off, the received data of PORT1 and PORT2 can be transferred by CPDMA.
       Isn't this CPSW_SS_FLOW_CTRL a function to stop the transfer of data from PORT1 and PORT22 to PORT0?

Flow control when enabled only pauses transfers, once the port FIFO frees up space the transfer continues. Please let me know if that answers your question.

Best Regards,

Schuyler

Hi Schuyler,

Thank you for your reply.

I understand about Q1 and Q3. I would like to present some additional information about Q2.

First, the customer is using Processor SDK Linux for AM437x v06.01.00.08.
They are testing it in the dual-MAC configuration and actually using the hub.
I also check with the customer about providing a block diagram showing the traffic path.

Additional customer survey results are shown below, It appears that PORT1 or PORT2 was forwarding a received packet.
They solved the problem in two ways:

(Method 1)
Setting BYPASS on CPSW_ALE_CTRL to bypass mode.

(Method 2)
Set up Register as shown below.
Set BYPASS of CPSW_ALE_CTRL to OFF and bypass mode to OFF.
Set CPSW_ALE_PORTCTL_0 to 2 as follows
Turn on NO_SA_UPDATE and turn off the ALE Table source address update.
Turn on NO_LEARN.
Set PORT_STATE to FORWARD (otherwise normal reception will not be possible).
Turn off P2_FLOW_EN and P1_FLOW_EN of CPSW_SS_FLOW_CTRL and turn off the receive flow control of Port1 and Port2.

So they have a question about method 2.
If NO_LEARN is turned on, the data will not be transferred because the connection destination will not be learned. However, if P2_FLOW_EN and P1_FLOW_EN in CPSW_SS_FLOW_CTRL are not turned off, the data seems to be transferred.
Do you know what this factor is?

Best Regards,
H.U

Hi,

I will need to discuss with fellow team members. It may take a day or two to get a response to this question.

Best Regards,

Schuyler

Hi Schuyler,

I am still expecting your response regarding this issue.

Best Regards,
H.U

Hello H.U,

We apologize for the delayed response. I will have more information for you soon.

Regards,

Nick

Hi Nick,

I’m sorry to rush you, but my customer are waiting for your reply.

Best Regards,
UNA