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AM3358: No link to RMII2 switch

Intellectual 720 points

Replies: 3

Views: 38

Part Number: AM3358

This is not really a question.
I asked the same question previously (link above) and did not get a response.

Now I found a solution, so I thought I'd share it.

The problem was that connecting an AM335x RMII2 to a KSZ8895 in U-Boot did not work.

The chips are connected using RMII2, MDIO and SPI.

First of all, U-boot has a bug, which always will force the use of RMII1 if only one RMII port is used.
I will forward a patch for that to U-Boot.

The second issue is that the Switch does not establish a link on RMII2.

This switch when configured in SPI mode, disables itself and you have to write 0x61 to register 1 to enable it.

Since I have 4 chip selects on SPI1 and the OMAP driver only supports 2 chipselects, I wrote a bitbanging driver.
This driver had a problem, which allowed reading from the switch.
The SPI bus was not available on any test pins, but connected to an FPGA.

The FPGAs were to be configured by SPI1 as well using a new driver, and I only got configuration working last week.
I now detected the problem of the SPI bitbang driver, the clock did not return to 0 at the end when in mode 0,
and the switch did not accept the write.

After fixing the driver, I managed to write to the switch over SPI, and by writing 0x61 to register 1,
the chip was enabled, and the network link was suddenly up and running.

  • Hi, 

    Thank you for sharing the results of your successful integration of a switch to the CPSW. Is the patch for U-Boot in the referenced thread is what you plan to send upstream? Do you have the switch working in Linux as well?

    For other people looking to do what you accomplished could you please describe if the SPI driver was the only way to enable the network? Is there an MDIO path method through an extended register perhaps?

    Best Regards,

    Schuyler

  • In reply to Schuyler Patton:

    I have Linux running, but I have not had the time to test the switch there yet.

    The register is not accessible to MDIO so I do not see a way to enable it from there.

    The TI SPI driver is limited to use only the H/W chip select so this has to be modified to accept GPIO as chip selects first.

  • In reply to Ulf Samuelsson:

    Did some further testing and the KSZ8895 driver in u-boot will actually set the needed bit to enable,
    the switch but as that depended on the SPI working (which it wasn't) that failed.

    The bug I found was in the u-boot cpsw_mdio.c:cpsw_mdio_get_alive()

    The return value is the lower 16 bits of &mdio->regs->control.

    To get the alive value, I am returning the lower 8 bits of &mdio->regs->alive