66AK2G12: Booting and debugging with QSPI Flash and DDR3 RAM.

Venkatesh,

We provide a bare-metal secondary bootloader in the PDK package inside Processor SDK RTOS, that allows customers to load and run application from either SD/MMC or QSPI flash. The documentation from the secondary bootloader and tools for flashing and creating boot images are described here:

https://software-dl.ti.com/processor-sdk-rtos/esd/docs/06_03_00_106/rtos/index_Foundational_Components.html#k2g 

Additionally, we also provide Uniflash tools for flashing QSPI :

https://software-dl.ti.com/processor-sdk-rtos/esd/docs/06_03_00_106/rtos/index_board.html#uniflash 

Please note the build for SBL uses PDK makefiles and there is no CCS project for the same.  Hope this helps.

Let us know if you have any further questions regarding the same.

Regards,

Rahul

Venkatesh,

K2G is an ARM boot master device, which means that the device after boot will have a ROM bootloader (present in ARM L2 ROM) will load the code/application on the ARM. Hence for you to run code on the DSP, you need to use the ARM SBL, that loads application for the DSP and wakes up the DSP to start executing the code. 

Uniflash in this flow will program ARM SBL at offset 0x0 on the flash and at 0x80000 for the application. Please read the details of the flash format for QSPI boot in the section in the bootloader documentation:

https://software-dl.ti.com/processor-sdk-rtos/esd/docs/06_03_00_106/rtos/index_Foundational_Components.html#preparing-qspi-flash

Rahul  

Rahul,

Thanks for the details, your recommendation has worked to run app from DSP. I would like to close this thread with below 2 more clarifications,

1. I am able to generate rprc output and then .bin from rprc, which is generated from CCS generated .out file, similarly will I be able to generate rprc output and then .bin from CCS generated .hex (intel hex) file?

2. As MLO is loaded at offset 0x0 and application at 0x80000, please clarify whether MulticoreImageGen.exe can combine both A15 and DSP application rprc outputs and generate one .bin file which can then be  loaded at offset 0x80000. If this approach is wrong, please provide information to load both ARM and DSP applications at its respective offset locations.

below are the offset, core and example command.

1. out2rprc.exe [.out file] [rprc output]
2. MulticoreImageGen.exe LE 55 [arm+dsp.bin] 0 [arm rprc output] [dsp rprc output] 5