CCS/AMIC110: Multi Protocol Demo (Profinet ) Doesn't work at all.

Hi Benjamin,

AMIC110 is a variant of AM335x with the same cortex-a8 core. The current Processor SDK version is: https://software-dl.ti.com/processor-sdk-rtos/esd/AM335X/05_01_00_11/index_FDS.html as specified in the user guide:

IPC should not need for the Profinet build.

Please follow the user guide and make sure you have the patch applied:

• To build the project, ensure the PDK patches in [INSTALL-DIR]/protocols/pdk_patches/[PDK-version] are applied

and GEL file updated:

• The application uses DMTimer4 as the clock source for the SYSBIOS Ticks (Refer to cfg file for details). The DMTimer module should be enabled for the application to load properly with the change. This needs to be done in the GEL file.

  Make the following changes in GEL File to enable DMTimer4

  1. Add the line inside hotmenu AM3359_ICE_Initialization()
     • WR_MEM_32(CM_PER_TIMER4_CLKCTRL, PRCM_MODULEMODE_ENABLE);
  2. Add the defines in the GEL File
     • #define CM_PER_TIMER4_CLKCTRL (PRCM_BASE_ADDR + 0x88)

                                     #define PRCM_MODULEMODE_ENABLE (2U)

Regards,

Garrett

Hi Garrett,

thanks for your reply, iI'm stucking; I cant apply the PDK Patch.
Is die PDK Version important? I have Version "pdk_am335x_1_0_17" installed.

I'm not sure of the versions at all, do I have to use the older one as recommencement on some help sites?
For example here:  https://software-dl.ti.com/processor-sdk-rtos/esd/AM335X/05_01_00_11/index_FDS.html They recommend CSS8.
Here: https://software-dl.ti.com/processor-sdk-rtos/esd/AM335X/latest/index_FDS.html They recommend CSS9,
and finally here: https://www.ti.com/tool/PRU-ICSS-INDUSTRIAL-SWVersion 10.1.1.

Back to the Patch:
While applying the patch the cmd gives me following error:

$ ./patch.exe -i /c/ti/PRU-ICSS-Profinet_Slave_01.00.03.04/protocols/pdk_patches/05.01.00/PRSDK-5019-K2G_EMACLLD_interrupt.patch -d /c/ti/pdk_am335x_1_0_17/packages/ -p 0 --binary --verbose
Hmm...  Looks like a unified diff to me...
can't find file to patch at input line 3
Perhaps you used the wrong -p or --strip option?
The text leading up to this was:
--------------------------
|--- src/icss_emacDrv.c Sat Oct  6 07:46:02 2018
|+++ src/icss_emacDrv.c Sat Nov 17 17:27:11 2018
--------------------------
File to patch:
Skip this patch? [y]
Skipping patch.
Hunk #1 ignored at 151.
1 out of 1 hunk ignored
done

The prebuild demo "prbuild_profinet_slave_IRT_AMIC11x_arm.out" is running well; but the self-build version does crash on:

 OSAL_OS_start();

probably because the patch isn't applied?
Thanks again for your help, i appreciate a lot.

Benjamin

Hi again,

with older versions recommended on other help sites, I mean especially this:
https://dev.ti.com/tirex/explore/node?node=AFYUSmoaKsgkWOxLzURLEQ__1RV.vaK__LATEST

Older versions of CSS and SDK-RTOS are mentioned, then i have installed:

is a downgrade recommended?
Best, Benjamin.

What is this patch actually for?
Applying patch via cmd is real pain.

Looking into the patch:

--- src/icss_emacDrv.c	Sat Oct  6 07:46:02 2018
+++ src/icss_emacDrv.c	Sat Nov 17 17:27:11 2018
@@ -151,26 +151,26 @@
 {
     if(32 > intNum)
     {
-#ifdef _TMS320C6X
+#if defined (_TMS320C6X) || defined (SOC_K2G)
         HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EICR),
                 CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, intNum);
 #endif
         HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_SECR0),
                 CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, ((uint32_t)1U) << intNum);
-#ifdef _TMS320C6X
+#if defined (_TMS320C6X) || defined (SOC_K2G)
         HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EISR),
                 CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, intNum);
 #endif
     }
     else
     {
-#ifdef _TMS320C6X
+#if defined (_TMS320C6X) || defined (SOC_K2G)
         HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EICR),
                 CSL_ICSSINTC_SECR1_ENA_STATUS_63_32, intNum);
 #endif
         HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_SECR1),
                 CSL_ICSSINTC_SECR1_ENA_STATUS_63_32, ((uint32_t)1U) << (intNum-(uint32_t)32U));
-#ifdef _TMS320C6X
+#if defined (_TMS320C6X) || defined (SOC_K2G)
         HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EISR),
                 CSL_ICSSINTC_SECR1_ENA_STATUS_63_32, intNum);
 #endif

and comparing my /c/ti/C:\ti\pdk_am335x_1_0_17\packages\ti\drv\icss_emac\src\icss_emacDrv.c at line: 152

static inline void ICSS_EmacClearIrq(ICSS_EmacHandle icssemacHandle, uint32_t intNum);   /* for misra warning*/
static inline void ICSS_EmacClearIrq(ICSS_EmacHandle icssemacHandle, uint32_t intNum)
{
    if(32 > intNum)
    {
#if defined (_TMS320C6X) || defined (SOC_K2G)
        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EICR),
                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, intNum);
#endif
        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_SECR0),
                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, ((uint32_t)1U) << intNum);
#if defined (_TMS320C6X) || defined (SOC_K2G)
        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EISR),
                CSL_ICSSINTC_SECR0_ENA_STATUS_31_0, intNum);
#endif
    }
    else
    {
#if defined (_TMS320C6X) || defined (SOC_K2G)
        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EICR),
                CSL_ICSSINTC_SECR1_ENA_STATUS_63_32, intNum);
#endif
        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_SECR1),
                CSL_ICSSINTC_SECR1_ENA_STATUS_63_32, ((uint32_t)1U) << (intNum-(uint32_t)32U));
#if defined (_TMS320C6X) || defined (SOC_K2G)
        HW_WR_FIELD32(((((ICSS_EmacHwAttrs*)icssemacHandle->hwAttrs)->emacBaseAddrCfg)->prussIntcRegs + CSL_ICSSINTC_EISR),
                CSL_ICSSINTC_SECR1_ENA_STATUS_63_32, intNum);
#endif
    }
}

looks like applying the patch was succesfully, OR it wasn't but it isn't mandatory because it was already there.

Hello Benjamin,

The PRU-ICSS-Profinet_Slave_01.00.03.04 package (Released on 14 Jan 2019) was validated against Processor SDK RTOS AM335x 05.01.00.11 (https://software-dl.ti.com/processor-sdk-rtos/esd/AM335X/05_01_00_11/index_FDS.html) using Code Composer Studio version 8.3.x. Ideally, the Profinet Slave CCS project creation and loading the application .out should work with higher version of CCS also (CCS 9.x or CCS 10.x)

The patch 'PRSDK-5019-K2G_EMACLLD_interrupt.patch' which you are trying to apply is applicable only for K2G SOC for fixing an interrupt race condition related issue. Since you are working with AMIC11x, you don't need to apply any PDK patch for Processor SDK RTOS AM335x 05.01.00.11

Once you are able to successfully build the application using CCS and profinet_slave_IRT_AMIC11x_arm.out is generated, it is important to modify the GEL file for enabling the DMTimer4 module before loading the application to AMIC11x board as mentioned in initial response by Garrett. For doing this please follow below steps

(1) Modify ...\ccsv8\ccs_base\emulation\boards\ice_amic110\gel\iceAMIC110.gel with below changes

(1.1) Add the below line inside hotmenu AMIC110_ICE_Initialization() at line no. ~374

WR_MEM_32(CM_PER_TIMER4_CLKCTRL, PRCM_MODULEMODE_ENABLE);

(1.2) Add the below two defines in the GEL File at line no. ~49

#define CM_PER_TIMER4_CLKCTRL (PRCM_BASE_ADDR + 0x88)

#define PRCM_MODULEMODE_ENABLE (2U)

With these changes, you should be able to load the application .out to the AMIC11x board successfully. Also, if you are using a higher version of processor SDK RTOS AM335x 06.03.00.106, you need to apply an application patch. Please refer to a related forum post which has the details https://e2e.ti.com/support/processors/f/791/p/956547/3538190 

Please let us know if you need any further details.

Regards,
Nijin P