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66AK2G12: Cannot change the ARM Clock

Part Number: 66AK2G12

I am using K2G ICE board. The default clock speed for ARMSS is 600MHz. According to the specification, this clock speed can be increased up to 1000MHz. We have tried the following two methods, but none of them have worked.

  • Called the monitor function _romtConfigPll(UINT32 pllNum, UINT32 prediv, UINT32 mult, UINT32 postdiv)
    , which is mentioned in spruhy8i.pdf->Table 4-35. Calls to ARMSS BootROM Functions. I have called this function from the SBL, at the end of SBL_socInit() with the parameters, pllNum = 4, prediv = 1, mult = 40, postdiv = 1, the function returned 0. But I have checked the clock speed and it is still 600MHz.
  • In another method, we have changed the content of C:\ti\pdk_k2g_1_0_16\packages\ti\board\src\iceK2G\iceK2G_pll.c

/* Earlier content */

:
const pllcConfig pllcConfigs_extClk[] = {
    {CSL_PLL_SYS,    96,     1,      4}, /* 600 MHz */
    {CSL_PLL_NSS,    240,    3,      2}, /* 1000 MHz*/
    {CSL_PLL_ARM,    96,     1,      4}, /* 600 MHz*/
    {CSL_PLL_DDR3,   128,    1,     16}, /* 200 MHz*/
    {CSL_PLL_UART,   767,    5,     10}, /* 384 MHz*/
    {CSL_PLL_DSS,    190,   12,     16}, /* 25 MHz*/
    {CSL_PLL_ICSS,   240,    3,     10}  /* 200 MHz*/
};
:


/* Now */
:
const pllcConfig pllcConfigs_extClk[] = {
    {CSL_PLL_SYS,    96,     1,      4}, /* 600 MHz */
    {CSL_PLL_NSS,    240,    3,      2}, /* 1000 MHz*/
    {CSL_PLL_ARM,    40,     1,      1}, /* 1000 MHz*/
    {CSL_PLL_DDR3,   128,    1,     16}, /* 200 MHz*/
    {CSL_PLL_UART,   767,    5,     10}, /* 384 MHz*/
    {CSL_PLL_DSS,    190,   12,     16}, /* 25 MHz*/
    {CSL_PLL_ICSS,   240,    3,     10}  /* 200 MHz*/
};
:

Could you please suggest how to change the clock speed?

  • Can you confirm that you have K2G EVM with 66AK2G12 that supports 1 GHz. We have two variants of the device one that support 600 MHz and 1 GHz. 

    The Devices contains a register known as DEVSPEED register in which the max device speed configuration is provided. IF you look at the GEL and the board library for evmK2G, the code reads the DEVSPEED register configuration and sets the device to its max speed. Check the following code:

        if (cfg & BOARD_INIT_PLL)
    	{
    		var= Board_getDEVSPEED();
            if(var == DEVSPEED1G)
            {
    			ret = Board_PLLInit_1G();
            }
            else if(var == DEVSPEED600)
            {
    			ret = Board_PLLInit();
            }
    		else
    			return BOARD_UNSUPPORTED_FEATURE;
        }

    Please note that the struct pllcConfigs_extClk is only used when the external clock is set to 25MHz. The struct will not be used if the ICE K2G is using external clock of 24 MHz which is the default. This logics is explained in the iceK2G.c file in the board library

        if (cfg & BOARD_INIT_PLL)
        {
            /* iceK2G Board has support for selecting clock input as
               either 24MHz or 25MHz. Need to check the input clock selection and
               configure the PLL accordingly */
            if(Board_getClockMode())
            {
                ret = Board_PLLInitExt();
            }
            else
            {
                ret = Board_PLLInit();
            }
            if (ret != BOARD_SOK)
                return ret;
        }

    Hope this helps. Please confirm DEVSPEED or part number based on case marking supports 1GHz and make sure that the jumper on the iceK2G is using 24 or 25 MHz clock mode.  apply the PLL change to the correct struct pllcConfigs_extClk (25Mhz) or pllcConfigs (24MHz)

    Regards,

    Rahul

     

  • Dear Rahul,

    Thank you for your response.

    > Can you confirm that you have K2G EVM with 66AK2G12 that supports 1 GHz. We have two variants of the device one that support 600 MHz and 1 GHz. 

    We are using K2G ICE board, with the following chip.

    > Please note that the struct pllcConfigs_extClk is only used when the external clock is set to 25MHz. The struct will not be used if the ICE K2G is using external clock of 24 MHz which is the default. 

    Oh, thank you for the information.I now, think pllcConfigs structure will be used, and experimented that too, but the clock is still 600MHz.

    > Hope this helps. Please confirm DEVSPEED or part number based on case marking supports 1GHz and make sure that the jumper on the iceK2G is using 24 or 25 MHz clock mode.  apply the PLL change to the correct struct pllcConfigs_extClk (25Mhz) or pllcConfigs (24MHz)

    I think Board_getDEVSPEED() is not called for ICE board. I have manually checked the value of the register BOOTCFG_EFUSE_BOOTROM and it is, 0x00010002. Which suggests ARM_SPEED is 600MHz.

    Does this mean, we cannot use 1000MHz. in this target board?

  • If ARM_SPEED on the sample is set to 600 MHz then it is likely the device doesn`t support 1GHz configuration. The case marking has X which indicates that these are pre-qualified devices so the best way to understand the speed configuration is to read the EFUSE setting from DEVPEED.

    The device PLL should be able to set the device to 1GHz but the other requirement for supporting the higher 1Ghz variant is the higher core voltage supply. How are you checking the clocks to understand the configuration. Are you reading back the PLL registers or using OBS_CLK to view the PLL configuration on an oscilloscope?

    You can change the PLL for experimentation but in the final production configuration, we only support the value that is programmed into the device. 

    Regards,

    Rahul 

  • Dear Rahul,

    Thank you for your reply.

    > How are you checking the clocks to understand the configuration. Are you reading back the PLL registers or using OBS_CLK to view the PLL configuration on an oscilloscope?

    No, we are not using any oscilloscope. We are checking with the set clock speed by using the performance monitor.

    > You can change the PLL for experimentation but in the final production configuration, we only support the value that is programmed into the device. 

    Thank you for the confirmation.

    The device's speed is marked as 600MHz in the EFUSE setting of DEVPEED, which suggests it only supports 600MHz.

  • Sumit,

    Can we close this issue or hold of until your evaluation is complete.

    regards,

    Rahul

  • Dear Rahul,

    Yes, you can close this issue now.

    Thank you for your continuous help and support.