Hi all,
I'm attempting to use a hardware timer in the PRU to manage parts of the program running on it. I've assumed the IEP is what I should use for this.
The goal is to have the timer running continuously, automatically wrap to 0 when it overflows so that when read and used with unsigned difference maths, it just measures the time difference since the last reading, regardless of matching and wrapping back to 0 from 0xFFFFFFFF.
I've finally understood how to slow the timer down with slow compensation as a clock prescalar, but now I need to limit it to 32 bits, to work with normal registers as 64 bit isn't needed.
I've attempted to configure the timer to compare and reset when its lower counter register is full at 0xFFFFFFFF, but I don't believe its properly resetting to 0.
Looking at page 73 of the C/C++ compiler manual v2.3, it looks like int and long data types are exactly the same, is this correct?
I've pasted my code blow which just initialises the timer at 200MHz to compare and reset on match for the CMP0 event when it reaches the full value in the lower counter 0xFFFFFFFF.
/* Clear SYSCFG[STANDBY_INIT] to enable OCP master port */ CT_CFG.SYSCFG_bit.STANDBY_INIT = 0; /* Disable counter */ CT_IEP.GLB_CFG_bit.CNT_ENABLE = 0; // Reset Count register regs high & low. CT_IEP.LOW_COUNTER = 0x00000000; CT_IEP.HIGH_COUNTER = 0x00000000; /* Clear overflow status register */ CT_IEP.GLB_STS_bit.CNT_OVF = 0x1; /* Clear compare status */ CT_IEP.CMP_STS_bit.CMP_HIT = 0xFFFF; //Set timer match compare values CT_IEP.CMP0_0 = 0xFFFFFFFF; CT_IEP.CMP1_0 = 0; //Timer reset value on match CT_IEP.LOW_CNT_RST = 0x00000000; CT_IEP.HIGH_CNT_RST = 0x00000000; // Reset on event CT_IEP.CMP_CFG_bit.CMP0_RST_CNT_EN = 0x1; //Enable CMP0 (16 bits in total, 1st is CMP0...16 is CMP15) CT_IEP.CMP_CFG_bit.CMP_EN = 0x0001; /* Clear the status of all interrupts */ CT_INTC.SECR0 = 0xFFFFFFFF; CT_INTC.SECR1 = 0xFFFFFFFF; /*Currently commented out
*This section below is to enable "slow compensation". * Essentially a prescaler to divide the 200MHz clock //Enable compensation counter mode CT_IEP.GLB_CFG_bit.CMP_INC = 1; // Disable fast compensation, off when using DEFAULT_INC or SLOW_COMPEN. On when need to speed up the IEP clock. CT_IEP.COMPEN_bit.COMPEN_CNT = 0x0; //Slow Compensation to slow the timer down (prescaler) Needs CMP_INC enabled CT_IEP.SLOW_COMPEN = 200; */ /* This Section below disables compensation so IEP clock * runs either as normal, or increments more than 1 count per clock cycle. */ //Disable compensation counter mode CT_IEP.GLB_CFG_bit.CMP_INC = 0; // IEP counter increments by 1 per clock cycle CT_IEP.GLB_CFG_bit.DEFAULT_INC = 1; // Enable IEP counter, final state to activate all timer settings. CT_IEP.GLB_CFG_bit.CNT_ENABLE = 1;