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TMS320VC5506: How to achieve the TMS320VC5506 configuring the McBSP FSX2, FSR2, CLKR2, CLKX2, as high impedance ?

Part Number: TMS320VC5506

What is the process for TMS320VC5506 configuring the McBSP FSX2, FSR2, CLKR2, CLKX2, as high impedance ?

We used McBSP of TMS320VC5506 as the PCM interface (Master A) and we paralleled the same BUS for another master chip called Master B to control Device on different scenario.

However, when Master B was transmitted, the Fsync and Clock voltage level had been affected by Master A even we had already settled all the port as a input status.

Could you help us , how to configured the McBSP FSX2, FSR2, CLKR2, CLKX2, as high impedance ?

Thank you.

  • He user476831,

    I've forwarded this to the experts. Their feedback should be posted here.

    BR
    Tsvetolin Shulev
  • Hi, Cvetolin Shulev-XID,

    Thanks for your help.
    Now, we have done a experiment that might be solved this problem. Shared with you.
    We refered the document (McBSP reference guide) on page 130 and 138.
    When DLB(digital loop back) bit was be settled "1" and the pin status on FSR/CLKR as high impedance.
    After tested, it worked, but we are not sure this method is formal or not.

    Thank you.

    -----

    Updated,

    We re-settled the registers as below, the FSX2, FSR2, CLKR2, CLKX2 are high impedance and the function of Master B is working normally.

    XIOEN, RIOEN=0, (serial port), CLKXM, FSXM, CLKRM, FSRM=0,

    Thank you.