we have an idea to output video data at Vout1 port of TDA3 (please see below port-list), the output goes into a SER.
We have video data (1280x800@60FPS, 8bit pixel depth, mono-chroma ) from Camera read into DDRAM, want to output the same video data at Vout1_port + pixel CLK, H and Vsync.
Due to design re-use only the orange colored ports are useable, other ports are not.
For this reason, we need your support on the information following:
-1) are ports [Vout1_d23: Vout1_d16] re-mappable to output video data [7:0] read from DDRAM?,
if yes, any data reference of doing, SW driver and register settings ?
-2) How to configure Hsync and Vsync timing to support output of video format (1280x800 @ 60FPS)
-3) any possible limitation with such design approach?