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TMS320C6748: TMS320C6748 Assembly instruction problem

Part Number: TMS320C6748

Hello everyone.

I am working on tms320c6748 kit.

In my assembly code iam using an instruction LDB *A2,B2 to load a value from pointer pointed by register A2 to register B2. But when i am looking in memory browser the B2  register is loaded with a value of 1 instead of 0x40  after executing that LDB instruction.

could anyone suggest me what is going wrong in that instruction?

Any other alternate instruction to perform the same operation.

Thanks and Regards

Asif

  • Hi Asif,

    You should not be looking at the memory browser for viewing CPU registers. Please view the CPU registers via the CCS view registers option instead of memory browser.

    You can view the values of A2 and B2 in that window and can inspect the actual values loaded. Also, note that there is a pipeline delay for Load (4 cycles).. so, if you are single stepping make sure to inspect it with correct delay.

    If you have any other instructions before the LDB, which can update B2 with some pipeline delay, you would see B2 getting updated at LDB with some value for previous instructions.

    If you want to debug the correct value that is getting loaded, you can have 4 NOP before and after the LDB and inspect the A2 and B2 registers. This would make the registers independent of previous register load/store influence.

    Thanks

  • Hii Arvind

    Sorry for the mistake, actually i was seeing register values through ccs view registers.

    Thanks for your response, i have given delay of 5 cycles after LDB instruction and i am now  getting correct values in that registers.

     when iam using parallel bars(||) with MVKL and MVKH instruction to execute instruction parallel, iam getting an error as "Functional Unit Conflict".

    what would be the reason for that error?

  • Hi Asif,

    As you may be aware, the core has L, S, D and M functional units on both sides (A and B).

    You can't use the same side functional unit on a given CPU cycle more than once.

    MVKL/MVKH instruction uses the S unit.

    Please go through https://training.ti.com/system/files/docs/c66x-corepac-instruction-set-reference-guide.pdf 

  • Hii Arvind,

    Now i got it. 

    Thanks for your valuable response.