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[FAQ] DRA821U: 5 port switch working with linux

Part Number: DRA821U

Hi 

I like to get the 5 port switch to work on the TI EVM? it looks like i need some binary to run on the MCU2_0 to get the switch to work? why do i need that? does that mean if I use the 5 port switch i can't use the MCU2_0? Please let me know about these questions and how to get it to work with linux SDK 7.02 i read the release notes but nothing points to how to use that??

Thanks

  • Hi,
    Typically CPSW 5G (and 9G) switch has to service multiple cores, like the A72 core running Linux and R5F cores running RTOS or AUTOSAR or
    for that matter any other application. See the picture below



    The CPSW HW already has the capability to service multiple cores via DMA but the control must reside with a single core or else there will be conflict during configuration. This simplifies DMA initialization, ALE configuration and arbitration of CPSW configuration requests from multiple cores through IPC.

    For this reason MCU 2_0 is designated as a core which runs the Ethernet FW. This does not mean that MCU2_0 cannot be used for other tasks. Ethernet Firmware features can also be used as a library, please see Vision Apps documentation  for this. Any application looking needs to integrate the Ethernet Firmware as a library and make the relevant application initialization calls.

    For Linux/QNX running on A cores, there is a virtual MAC interface provided which abstracts the CPSW 5G interface. So, if you boot Linux on a Jacinto device, you will an eth1 interface which corresponds to the CPSW switch.

    A single interface does not mean that there is only one port available for Linux/QNX. It means that the 4 ports in CPSW 5G are
    available as virtual ports. To receive data, the Host needs to configure the ALE appropriately.



    Please refer to this documentation regarding configuration of Ethernet Firmware.

    This means that Linux does not have any DT bindings for the CPSW 5G hardware and configuration is done by the Ethernet Firwmare running on MCU2_0. If user wishes to interface a new PHY or use SGMII or RGMII then they need to modify Ethernet Firmware and ENET LLD layer.


    For information on interfacing a new PHY, refer to this documentation

    Regards
    Vineet