J721EXSOMXEVM: PSDKRA7.2 : Ethfw UART port change in Vision_apps firmware

Hi TI members:

Our customer board only have "MAIN_UART0 / MCU_UART0 / WKUP_UART0" three UART ports,

and MAIN_UART0 is used for A72 print linux log.

So we would like to change ethfw UART port to MCU_UART0 or WKUP_UART0.

Right now we do belowmodify for change UART port

--- a/packages/ti/drv/enet/examples/utils/V1/enet_appboardutils_j721e_evm.c
+++ b/packages/ti/drv/enet/examples/utils/V1/enet_appboardutils_j721e_evm.c
@@ -231,8 +231,10 @@ static void EnetBoard_boardInit(Board_initCfg *boardCfg)
      /* mcu2_0 UART instances:
      *  - J721E EVM: UART2
      *  - J7200 EVM: UART3 */
-    initParams.uartInst      = ENET_UTILS_MCU2_0_UART_INSTANCE;
-    initParams.uartSocDomain = BOARD_SOC_DOMAIN_MAIN;
+    //initParams.uartInst      = ENET_UTILS_MCU2_0_UART_INSTANCE;
+    //initParams.uartSocDomain = BOARD_SOC_DOMAIN_MAIN;
+    initParams.uartInst      = 0;
+    initParams.uartSocDomain = BOARD_SOC_DOMAIN_WKUP;
     /* Use non-exclusive mode in board lib when accessing the module for clock enable
      * to let Linux also access the module */
     initParams.pscMode = BOARD_PSC_DEVICE_MODE_NONEXCLUSIVE;
@@ -270,7 +272,8 @@ void EnetBoard_initEthFw(void)
     uint32_t clkModuleId[] = { TISCI_DEV_DDR0,
                                TISCI_DEV_TIMER12,
                                TISCI_DEV_TIMER13,
-                               TISCI_DEV_UART2, };
+                              TISCI_DEV_WKUP_UART0, };
+                               //TISCI_DEV_UART2, };

then I do one time SDK clean_build for compile new code,

I also confirm the WKUP_UART0 TX/RX pinmux,

J28 -> WKUP_UART0_TXD : 00010000  (pin 41 (PIN41) 4301c0a4 00010000 pinctrl-single)

J29 -> WKUP_UART0_RXD : 00050000  (pin 40 (PIN40) 4301c0a0 00050000 pinctrl-single)

but I still can't see the ethfw form WKUP_UART0.

Do you have any idea?

BR

Sentinen Chen