Other Parts Discussed in Thread: TEST
Dear Expert ,
Good day !
Our customer use the DAC38RF82 to check the QPSK signal , sometime , the I /Q phase will have big deviation ,like the screenshot below
Normally , this value is 0.3 , but there is 10 percent will become 2.7 . the customer had test numerous chips , they had same problem , it seems like cause by the register setting ,
They set the dac38rf82 in 82121 mode , and 4x Interpolation , 6.4G sample rate , 1.6Ghz data rate , the FPGA use the xilinx XC7VX330T.
Could you provide any suggestions base on your experience how to solve it ?