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AFE7950: GPIO for TDD and SYNC_IN/OUT

Yoonsun Kim
Expert 1740 points
Part Number: AFE7950

I plan to use four single ended GPIOs - one for TX_4CH_TDD, one for RX_4CH_TDD, one for ADC_4ch_SYNC_IN, and one for DAC_4ch_SYNC_OUT.

Can I select any GPIO or is there any recommended pin?

  • +1
    TI__Genius 10505 points

    Hi Yoonsun,

    Preferred balls for TXA_TDD, RXA_TDD, CMOS ADC_SYNC0 and CMOS DAC_SYNC0 are H15, E7, H8 and H9 respectively. 

    Below parameter can be set to control all 4 Tx and 4 Rx channels' TDD with TXA_TDD and RXA_TDD respectively. 

    sysParams.modeTdd = 0

    To use common sync (SYNC0) for all Rx channels, set below parameter:

    sysParams.rxJesdTxSyncMux= [0,0,0,0]

    To use common sync (SYNC0) for all Tx channels, set below parameter:

    sysParams.jesdRxSyncMux = [0,0,0,0]

    To configure single-ended or CMOS SYNC, set below parameters:

    sysParams.jesdABLvdsSync = 0

    sysParams.jesdCDLvdsSync = 0

    All the system parameters and GPIO configuration are explained in AFE79xx_ConfigurationGuide_SBAA417_Jun2020.pdf available on secure folder. 

    Regards,

    Vijay