Other Parts Discussed in Thread: AFE7900
Hello support team,
We are planning to use AFE7900EVM with ZCU102 Evalutaion board using JESD IP core and interfacing. I have gone through the details and I have below queries.
1. As AFE7900EVM interfacing with ZCU102 , JESD IP core is being used , while AFE7900EVM configuration and control is done via Latte GUI .
That means All AFE7900EVM configuration such as ADC sample rate , DDC configuration, NCO frequency selection, AGC mechanism , decimation filter selection, I,Q output rate etc. configured by latte GUI , so it will be done using zynq Processing system ( PS ) and for the configuration of AFE7900EVM , No zynq PL resources will be used? Is my understanding correct? please guide.
What I understand is that PL resource usage will be done after I,Q detection and all AFE7900EVM configuration done is PS. Request you to provide support.
