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DAC38RF82: Can DAC38RF82 Operate without SYSREF?

Part Number: DAC38RF82

Hi expert,

If customer don’t have multiple chips to synchronize or deterministic latency demand, could they ignore SYSREF+/- e.g. floating or tie to GND?

In addition, we see register 0x24 & 0x5C SYSREF_MODE can be set "Don’t use SYSREF pulse", are these two the only registers need to pay attention? 

Please help clarify whether DAC can bring up successfully without SYSREF+/- input & set 0x24/0x5C registers.

Regards,

Allan

  • Allan,

    Inside the DAC38RF82, the clock divider block and JESD block only have options to be synchronized by SYSREF. To guarantee synchronization, at least two SYSREF pulses are required. The "Do not use SYSREF pulse"  option for these two registers should not be used. 

    Per the data sheet, this device only supports subclass 1 mode, which requires the SYSREF input.

    Regards,

    Jim 

  • Hi, Jim :

    If SYSREF is a MUST for DAC38RF82, could we use the feature of the internal SYSREF generator (LCMGEN)?

    If yes, could you please show the register 0x10~0x12 setting of Miscellaneous Configuration page?

    Please give an example & help us to realize.

    Thanks.

    Regards,

    Yao-Hua  

  • Yao-Hua,

    This method is not recommended. This function was to be used as a test features and not recommended for design. 

    Regards,

    Jim

  • Hi, Jim :

    Got it & thanks.