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Original question:

DAC38RF86: JESD SYNC error (red light) on DAC38RF86EVM

DAC38RF86: Documentation for On-Board VCXO Clock Mode (CMODE4) on DAC38RF86EVM

Vaibhav Jain
Prodigy 180 points
Part Number: DAC38RF86

Hi All,

I am working with DAC38RF86EVM connected with TSW1456 Rev E where DAC is being used for waveform generation. I wanted to use DAC without supplying with an external clock to it, thus using the On-Board VCXO Clock Mode (CMODE4) as mentioned in the documentation. However, while reading through the document, the setup examples and steps shown are only shown for two modes : Direct External Clock Mode With High Amplitude Clock (CMODE1) and On-Chip PLL Clock Mode (CMODE3). I was trying to run the setup based on the instructions of CMODE3 and changing the bits required for VCXO Clock mode, however I am still unable to generate pattern using DAC in the same mode. Is there any separate documentation available for the VCXO mode or the changes required for it both hardware/ software , or is it very close to the On Chip PLL Clock mode minus the external clock?

Thanks for your consideration and looking forward to your response.

Thanks and Regards,

Vaibhav Jain.

  • 0
    TI__Intellectual 1660 points

    Hey Vaibhav, 

    CMODE4 is also known as "holdover mode" as it essentially provides a fixed voltage to the VCXO and does not place it in a loop with an external reference. Please note the close in phase noise (and therefore jitter) of the system will be quite high as VCXO's are typically used in a PLL with a reference clock that has good frequency stability (close in phase noise)

    I have attached a configuration file you can use with the EVM software that should get you in holdover. It will lock the VCO in PLL 2 to 2949.12MHz and then send a divided out 368.64Mhz out DCLK4 to the DAC. From there you should be able to lock the RFDAC PLL.

    Regards, 

    Matt

     LMK_DUALLOOP_HOLDOVER_368.64MHZ DACCLK.cfg

  • 0 in reply to Matthew Kramer
    TI__Intellectual 1660 points

    Quick correction. DCLK2 and not DCLK4. 

  • 0 in reply to Matthew Kramer
    Prodigy 180 points

    I will have a go at DAC with this config file today and will update the results. Thanks a lot for this. Slight smile

  • 0 in reply to Vaibhav Jain
    Prodigy 180 points

    Hi Matthew, I ran the DAC using the provided config file and I am able to set it up in the on board VCXO clock mode. I am trying to send 100 MHz sinusoidal pulses from the DAC ( using DAC as a signal generator), using single DAC mode. However I am unable to get the pattern out from the DAC. I am sharing screenshot of the DAC GUI, HSDC Pro settings and the DACEVM board and the pattern received on oscilloscope for reference. Do, I need to make some other changes as well for the DAC to be able to send sinusoidal pulses?  Is it related to change in settings of NCO or Mixer as shown in documentation? Thanks again for the help. 

    The basic steps I am following for the GUI for these purposes are:

    1) Toggle DAC Reset B pin, loading default, then loading the config file provided, configuring DAC, resetting jesd Core and Trigger SYSREF in the DAC GUI

    2) creating a 100 MHz tone in HSDC Pro using I/Q multitone generator and sending it over using Send button

    3) Resetting the JESD Core and Trigger SYSREF.