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DAC38RF82: Configuration Setup Question

Part Number: DAC38RF82

Hello,

I would like to confirm a proper configuration for DAC38RF82 for our application.

We need to create a baseband signal (coming from FPGA) of bandwidth between 50-100MHz (Internal data rate will be 100-200MSPS). This is a single I/Q stream.

We need to feed this stream through JESD204 using 22210/44210 mode. We plan to use a Reference clock of 100MHz.

The output frequency should be around 1.6GHz, so we should have a spectrum of 100MHz with a center frequency of 1600MHz. DAC sampling rate selected at 6400MHz.

We use the DUC to upconvert the baseband signal to 1.6GHz, using NCOs.

Please check if the configuration set in the GUI EVM tool matches the desired behavior.

Questions:

1. According to the Datasheet, we need to configure in Dual DAC mode to use the NCO mixers for upconversion. Is this correct or we could use path AB and CD on the same DAC?

2. Do we need to use SYSREF for the Dual DAC configuration in Wide-band configuration? 

3. For the JESD204 interface we need to configure each DAC in 22210 mode, correct (not 44210)?

4. Changing the SERDES configuration to a lower rate is not depicted in Quick Start. Is this ok? Will the register setup be updated?

Thanks in advance,

Ilias

  • Hi Ilias,

    Sorry it has taken a while to get back with you about this. You can use single dac and AB to upconvert to 1.6GHz NCO frequency.

    For a 100MHz spectrum and 6.4GSPS clock, you will want to target 24x interpolation. This will reduce the input data rate to 6400/24 = 266.667MSPS allowing more flexible serdes LMFS options. See configuration below which I have used to test this just now.

    Note the below page mapping configuration is specific to our evaluation hardware.

    This should provide you with a input bandwidth of around 80% * 6.4G / 24 = 213MHz, well within passband region of interpolation filter, meaning no attenuation.

    I have sent an IQ signal centered at 0Hz (composed of 10 single frequency sinusoids) to reflect your 100MHz input signal. The signal centered around 0Hz is then mixed up to 1600MHz using the NCO set at 1600MHz. Below is the output on a spectrum analyzer.

    Regards, Chase

  • Dear Chase,

    Thank you for the response. I didn't realize that the mixer box controlled also the NCO mixing.

    In SERDES configuration tab:

    Bus width 20/16-bit is for payload (unencoded) (ie. 16-bit DAC=> 16), is this correct?

    Regarding the JESD tab:

    I understand the concept of the SERDES frequency reduction, but the configuration shown for LMFS=3100 shown does not seem valid to me.

    I would expect a value of 4211. Is this correct?

    Also the N,N' values should be 16 for 16-bit DAC values correct?

    Thanks,

    Ilias

  • Hi Ilias,

    These values are displaying L-1, M-1, F-1, S-1, N-1, etc. The LMFS for this mode above is 4211. Regarding the buswidth, the datasheet shows the register field changed in a previous revision from being programmable field to RESERVED and to write bits 4:2 in register 0x3E as 3b'010. You can change the bitwidth of incoming data if you'd like in register 0x0C bits 15:14.

    Regards, Chase