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AFE7685: external AGC Full Range Control Through Parallel GPIOs

Part Number: AFE7685
Other Parts Discussed in Thread: AFE7686,

Hi,

We would like to use external AGC "Full Range Control Through Parallel GPIOs'

We setup register GAIN_CNTL_* to parallel GPIO but seems like it does not working, I have questions regarding to this issue:

1. In Datasheet PG3 from April 2018 it says "In the AFE76xx, each 2RX channels have 8 GPIO pins that can be used to set the RX DSA attenuation
quickly in a parallel way" , in slau767 it says "In AFE7686, each 2RX channels have 8 GPIO ..." , my question if AFE7685 has this options?

2. in slau767 it says in "Table 17. Program the GPIOs used for RX DSA Control" that Address(hex) are 36, 38, 3A,3C while I found that it should be in register 190 (Value FF to make inputs)

do you have updated document or correct addresses document that describe "Program the GPIOs used for RX DSA Control" ?

3. in slau767 "Table 11. RX DSA Programming Example" it says in address 300 "In Pin AGC mode, RX_FAST and FSPI lines are gated.0x61000300[1:0]"

a. how to open the gated pin ?

b. what is 0x61000300[1:0] , I know address is 0x0300 for SPI, so what is the 0x6100 ?

Thank You

Arik

  • Hi Arik

    In regards to your question:

    . In Datasheet PG3 from April 2018 it says "In the AFE76xx, each 2RX channels have 8 GPIO pins that can be used to set the RX DSA attenuation
    quickly in a parallel way" , in slau767 it says "In AFE7686, each 2RX channels have 8 GPIO ..." , my question if AFE7685 has this options?

    Yes, both AFE7686 and AFE7685 have this option.

    2. in slau767 it says in "Table 17. Program the GPIOs used for RX DSA Control" that Address(hex) are 36, 38, 3A,3C while I found that it should be in register 190 (Value FF to make inputs)

    do you have updated document or correct addresses document that describe "Program the GPIOs used for RX DSA Control" ?

    No, below example is correct. The register matches the TRM for these particular GPIOs

    3. in slau767 "Table 11. RX DSA Programming Example" it says in address 300 "In Pin AGC mode, RX_FAST and FSPI lines are gated.0x61000300[1:0]"

    a. how to open the gated pin ?

    b. what is 0x61000300[1:0] , I know address is 0x0300 for SPI, so what is the 0x6100 ?

    These two features are not available in PIN AGC mode. The user does not need further actions on this

    -Kang

  • Hi Kang,

    Thank you for your help, still the RX DSA from GPIO is not working.

    I saw that the pins FSPICLKx (FSPICLKA for example) and the pin FSPIDx (FSPIDA for example act like output and not input, it like it force "0" as output and not behave like input. I have tried to play with FSPI_TERMINATION and it does not help, I disconnected the input (i have resistor ) and connect pull up 100 Ohm to 1.8V to the FSPICLKA , and the voltage was like 0.5V instead 1.8V, seems like the pin(s) act like output.

    Please your advice

    Arik

  • Hello Arik,

    For FSPICLK and FSPIDx, you may use the following commands:

    0x0011 0x08   ##open traffic controller page

    0x01DB 0x41   ##FSPI_CLK-A OE_N = 1

    0x01DC 0x41   ##FSPI_DATA-A OE_N = 1

    0x01DD 0x41   ##FSPI_CLK-B OE_N = 1

    0x01DE 0x41   ##FSPI_DATA-B OE_N = 1

    0x01DF 0x41   ##FSPI_CLK-C OE_N = 1

    0x01E0 0x41   ##FSPI_DATA-C OE_N = 1

    0x01E1 0x41   ##FSPI_CLK-D OE_N = 1

    0x01E2 0x41   ##FSPI_DATA-D OE_N = 1

    0x0011 0x00   ##close traffic controller page

    Please let me know how this works out for you. Thank you

  • Hello Kang, 

    You are amazing, seems like it solved FSPICLK and FSPIDx issue.

    Great thanks !!

    Please give me few days to see if I have no other issue regarding to external AGC.

    If all OK I will close my issue

    Great thanks again 

    Arik

  • Arik,

    No problem. We are simply recommending solutions. Glad to hear the initial positive result and please keep us updated.

    -Kang

  • Hello Kang,

    external AGC "Full Range Control Through Parallel GPIOs'" is working fine !

    Again, great thanks!

    B.T.W, How can I get updated register document that include 0x01DB - 0x01E2 in traffic controller? I have SLAU744A
    May 2018–Revised July 2018

    Thanks

    Arik