Other Parts Discussed in Thread: AFE7686,
Hi,
We would like to use external AGC "Full Range Control Through Parallel GPIOs'
We setup register GAIN_CNTL_* to parallel GPIO but seems like it does not working, I have questions regarding to this issue:
1. In Datasheet PG3 from April 2018 it says "In the AFE76xx, each 2RX channels have 8 GPIO pins that can be used to set the RX DSA attenuation
quickly in a parallel way" , in slau767 it says "In AFE7686, each 2RX channels have 8 GPIO ..." , my question if AFE7685 has this options?
2. in slau767 it says in "Table 17. Program the GPIOs used for RX DSA Control" that Address(hex) are 36, 38, 3A,3C while I found that it should be in register 190 (Value FF to make inputs)
do you have updated document or correct addresses document that describe "Program the GPIOs used for RX DSA Control" ?
3. in slau767 "Table 11. RX DSA Programming Example" it says in address 300 "In Pin AGC mode, RX_FAST and FSPI lines are gated.0x61000300[1:0]"
a. how to open the gated pin ?
b. what is 0x61000300[1:0] , I know address is 0x0300 for SPI, so what is the 0x6100 ?
Thank You
Arik