AFE8030EVM: SPI is Working When we do SW1 reset only

Shiva,

Were you able to resolve your previous post on E2E? Did following Kang's advice resolve the previous issue? Is that ground connection still made while you are seeing the current issue?

Please advise ground connections between the FPGA board and the AFE80xx EVM. We have experienced SPI failures before due to poor ground connections between the FPGA and the AFE80xx EVM before. Please check if somehow the USB is helping connecting the ground between the two boards. 

Is R81 installed on your EVM? Can you probe the RESET net to see if the FTDI chip is controlling the signal?

Regards,

Ben

 The FPGA and TI board are all mounted on the same base plate. They are all grounded together. I was monitoring the current consumed by the EVB and I see that when I switch it on it consumes certain current (1.03 A or example) and SPI is not working. After pressing SW1 (reset button) current consumption increases (to 1.07 A) and SPI starts working. When SW1 is pressed the amount of current is 1.03 A. It looks like the AFE chip is in reset when I start the EVB and after I press SW1 it gets out of reset!

I actually removed R81 to be sure that FTDI is not affecting something. I probed RESET_3P3 pin coming from the FTDI chip (this is level shifted to RESET_FTDI) but it was always at 3.3 V even when I was pressing SW1.

I agree that it looks like some grounding thing. But both the boards are grounded to the baseplate. Could the FMC pins be doing something? There is a possibility to send reset via the FPGA right? (by mounting R80 resistor). Should that be explored?

Hi Ben,

we did some more tests with the EVM we see some wired behavior . I removed everything and just started testing the TI board. No connections to  FPGA or anything. I am just monitoring the current that is consumed. Even then the chip starts in an undefined state and I have to press the SW1 button to reset it to default state. I probed the reset signal that goes into the AFE on a working board and a non working board. It looks like below. In the working board the reset starts to go high but is then pulled low for some time. This doesn’t happen in the non working board. How is the reset getting pulled low? Is it the reset_FTDI signal that does it?

Regards 

P Shiva

Shiva,

The AFE8030 does not require a hardware RESET toggle on power-up. The FTDI and SW1 are connected to the RESET pin but are not toggled during power-up. Do you have the mini-USB cable connected to the AFE EVM for your experiments? Can you confirm R77 pull-up to 1.8V is populated and the RESET net is not left floating?

Regards,

Ben

Hi Ben,

We are not connecting mini-USB cable for our experiments because we are Programming AFE8030 using FMC SPI lines.

Regards 
P Shiva

Shiva,

Can you confirm RESET net is not floating? 

Can you also confirm with the board shop on any QC testing they performed?

Regards,

Ben