Tool/software:
Hello,
I'm seeing a latency of ~2us between data going into the tx_lane_data port of the TI JESD204C IP and signal coming out of the DAC. The DAC freq is 3GHz and the FPGA clock is 375MHz. The LMFS of the IP is 8821 and both links of the AFE7950 are set to 4421 with E=3 (sysref freq = (375/192) MHz). I see RBD values anywhere from 18 to 32 reported by Latte and the links come up successfully. Any idea what could be causing such a large latency? The TI JESD204C IP was set for E=1, but I don't think this could account for 2us.
Thanks,
Dave