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ADC31RF80: JESD format

Part Number: ADC31RF80
Other Parts Discussed in Thread: ADC32RF80

Team,

Customer would like to use decimation 24 to have 122.88Mhz sampling rate with LMFS=1241 setting but why there is no this configuration in datasheet table 15? 

Would you please let us know what's the correct JESD sample lane alignment? Also we are wondering why there is L=8 setting in table 15 but not in table 14?

In addition, would you please teach us the setup procedure to use DDC-mode test patterns? We have tried to change 0x37 but just didn't work at all.

Thanks.

Allan