Hi,
I am using ADS58J63 in my design.
In the JESD Analog page (6A00h) the bits D1 and D0 shows the JESD PLL MODE settings as in below image (Page number 70 and Figure 136 in data sheet)
But in the Field Descriptions it is mentioned only D0 bit to set the JESD PLL MODE as in below image (page number 70 and Table 61)
So let me know which one should I follow to set the register 16h ?
Regards,
Sandeep