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AFE7769EVM: How to configure AFE7796 from an external FPGA?

Yusuf Tas
Prodigy 30 points
Part Number: AFE7769EVM
Other Parts Discussed in Thread: AFE7769

Hello,

I am using AFE7769EVM and TSW14J56EVM together. I verified that they are working as intended by following the steps in user guide document.

Is it possible to configure AFE7769 registers by using only the FPGA in TSW14J56? If so what are the changes needed for firmware?

On the 19th page under the title of AFE77xx Bringup Flow of AFE77xx Latte GUI document (http://www.ti.com/lit/ug/sbau340/sbau340.pdf) it mentions there are C codes provided separately. How can I access them?

Thanks.

  • 0
    TI__Mastermind 18095 points

    Yusuf:

    It is good to hear that your initial evaluation was successful.  The EVM does route the SPI lines to the FMC connection so that it is possible to control the device through an FPGA.  There is a board modification required to engage the jumpers for those connections and to remove jumpers going to the FTDI chip.  The TSW14J56 does not provide an option to control the device through those connections and I am unable to give much guidance on FW modifications to achieve that.  That said, the SPI is a simple address/data construct that should be straight forward to implement in FW code.

    We have a Technical Reference Manual that provides documentation on how to program the device.  We also have C code available.  These documents are located on the MySecureSW site.  This site can be accessed by going to the product page here and clicking on the "Submit Request Form": http://www.ti.com/product/AFE7769/samplebuy.  In your case, you already have access so you can go to the My Secure site directly.

    --RJH

  • 0 in reply to RJ Hopper
    Prodigy 30 points

    Thank you.

    Voltage range of SPI pins of AFE7769 is mentioned as -0.5V and VDDGPIO1P8+0.3 in the datasheet. I traced these SPI pins through FMC connector and observed that corresponding pins of Arria 5 FPGA has 2.5V bank voltage. Do you think it is still safe to make the jumper modifications?

  • 0 in reply to Yusuf Tas
    TI__Mastermind 18095 points

    Hmmm.  Perhaps not.  It is risky.  The best approach would be to introduce a voltage translator to ensure proper logic levels are maintained.  I realize that this is not convenient or practical when using existing hardware.  As a quick fix you could kludge in a voltage divider to drop the 2.5V max level to 1.8V logic.  There is already a series component available so only a shunt resistor needs to be kludged.  It is not ideal, but for low speed SPI with nominal logic levels it would likely work.

    --RJH