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AFE7444EVM: Optical modulation and monitoring, follow up

Part Number: AFE7444EVM
Other Parts Discussed in Thread: AFE7444

This is a follow up on the question in this thread.

Hello, I still have a couple of questions about the AFE74xxEVM boards

1- Can the DACs and ADCs of a single AFE74xxEVM board, in conjunction with the TSW14J57, function simultaneously? That is, using the High Speed Data Converter Pro, is the board able of recording from the ADCs without stopping the output from the DACs?

I have this question because in your training video How to configure the AFE74xx ADC in Mode 4 using the internal PLL | TI.com Video, in the moment the capture button is pressed (at 1:20 in the video) the output shown in the spectrum analyzer vanishes.

2- Can the DUCs at the DAC side be bypassed?

2.1- If not, can I just set the frequency of the associated NCOs to 0?

2.2- Same thing goes for the DDC, as an inelegant solution can I set the NCOs at the DDC to a frequency of 0, thus "bypassing" the DDC? 

Thank you in advance for your help.

  • Hi Daniel,

    When using TSW14J57, capturing ADC output using regular ini reset ADC JESD link that disturbs DAC link. After ADC is captured once with regular ini, select the same ini with "_XCRV" at the end. This ini doesn't reset the link and can be used for simultaneous DAC and ADC operation. If lane rate of more than 10Gbps is not needed, you can use TSW14J56EVM. On this EVM, capturing ADC output never disturbs DAC link.

    DDC/DUC bypass mode is not available in AFE7444. Making NCO zero is not equivalent to DDC/DUC bypass. When DDC is used, output BW is equal to (ADC Sampling rate)/(2*decimation). Full BW (Fs/2) is available only in bypass mode. The same applies to DAC. 

    Regards,

    Vijay