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Part Number: TSW38J84EVM
We are using the TSW38J84EVM module connected to a Xilinx Ultrascale+MPSOC Z102 and are intending to program the LMK04828 and the DAC38J84 through SPI signals that interface through the FMC connector and no program the SPI registers through the GUI. We need some information about the CPLD that is inbetween the FMC and the devices that passes these signals through. Is there any documentation about the CPLD on the TSW38J84EVM for passing the SPI signals from the FMC?
Questions that we need answered:
When SPI_SELECT is set high (through the jumper JP3)
Does SCLK from FMC get passed to both LMK04828 and the DAC38J84?
Does the FMC_SDO get passed to both DAC_SDO and LMK_SDO?
Does the FMC_SDIO get passed to both DAC_SDIO and LMK_SDIO?
Does FMC_SEN_DAC connect to DAC_SDENB and FMC_SEN_LMK connect to LMK_CS?
Which pins on the 5M80ZT100 do the FMC_B5 and FMC_B6 pins get connect when SPI_SELECT is high?
How are the TRF3722 SPI interface pins controlled through the SPI interface to the FMC (if it is at all)?
What is the intention of FMC_DIR_CONTROL?
Please let me know through answering these questions or through a document that describes the use of the 5M80ZT100 on the TSW38J84EVM.
I believe the SPI select selects whether you want to route the signal from FMC connector or program from the USB chip.
I think the original verilog file may better answer your questions better. Please see attached below.
You may feel free to re-program the verilog file and using Altera USB blaster into J15 of the board.
Below is the original .pof file in case you need to recover.
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