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I want to clarify:
At the beginning, Tx0 is connected to Rx1 and Tx1 is connected to Rx0 on the DS280DF810EVM Evaluation board by the bundled cable, the registers for the Tx0 and Rx1 channel were configured using the program for the Evaluation board DS280DF810EVM, where Tx0 is the PRBS generator and Rx1 is the receiver, and an eye chart was received but nothing was recorded in the registers for the Tx1 and Rx0 channels.
Then a board was drawn to generate the PRBS sequence and evaluate the eye diagrams on the received channel, built on the DS280DF810 chip. There the Tx0 channel is used to generate the PRBS, and the Rx1 channel is used to receive the PRBS. The transmitter and receiver of the DS280DF810 microcircuit are connected to each other through the corresponding connectors using the loop-back module. Register settings for the DS280DF810EVM debug board were used for our board. But the eye chart could not be obtained.
An experiment was conducted on the Evaluation board: in the version where we managed to get an eye diagram, disable the Tx1-> Rx0 pair, and Tx0 is connected to Rx1 as on our board. We apply the same register settings for the variant which I described at the beginning of the letter. At the same time, the eye diagram is falling apart.
Why does it happen?
Perhaps some mode is not configured?
Or it is necessary that 2 pairs of one group (for example Tx1-> Rx0, Tx0-> Rx1) must be connected for application in the topology of one transmitter and receiver, which are in the same group?
Figure 1 shows a part of our circuit, where the number 1 shows a transmitter and a 2-receiver connected to each other through the appropriate connectors using the loop-back module.
Hi Dmitry, I responded to your questions in the other forum. Please review my inputs below carefully and double check your setup aligns with these recommendations.
Retimer channel 0 will not be able to output PRBS data unless there is some input data present. The basic setup/data path required is described below. A setup where retimer channel 0 Tx is fed to channel 1 Rx and channel 1 Tx is fed to channel 0 Rx is not feasible.
Each retimer channel is independent, as each one has its own CDR and its own set of channel registers.
The external source Tx signal may be either a PRBS pattern or 1010 clock signal of data rate matching the CDR rate programmed on the retimer channels under test.
Please note that TI has a software GUI available called SigCon Architect which allows you to configure the retimer EVM and also read its status registers.
The main updater for SigCon Architect is downloadable via link below.
Download access for the DS280DF810 GUI profile can be requested via the TI.com product page.
HSSC Applications Engineer
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In reply to Rodrigo Natal:
In reply to Brian Costello:
In reply to Dmitry Rozhdenko:
The setup configuration described in your email where retimer Tx0 is connected to Rx1 and Tx1 is connected to Rx0 is not supported by the DS280DF810. The DS280DF810 retimer channels cannot generate PRBS data unless there is some input signal that the CDR can lock to. In your case, neither retimer channel has an input signal to serve as reference.
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