We are unable to get the DAC38RF97 to accept writes. We have a 80MHz signal provided to DACCLK and SYSREF (verified on a scope) and a 100MHz signal provided to DACCLKSE. We have verified all voltages to be correct. We have verified that sleep, jtrstb, testmode, dac_gpi0, dac_gpi1 are logic zero (these are driven from an FPGA). We have also been able to verify that we can manually toggle resetb. After a resetb, we execute the attached script using a BusPirate SPI master. The FuseFarm appears to have been loaded, as indicated in read at 0xff = 0x89. Currently we are looking at ATEST and writing to 0x01 to select and hopefully read voltages as an indication that the SPI is able to write correctly. We have not been able to write and subsequently read several addresses, including address 0x09. What may be preventing us from writing? Help is appreciated...
SPI> SPI>[0xff r r] /CS ENABLED WRITE: 0xFF READ: 0x80 READ: 0x09 /CS DISABLED SPI> SPI>[0x80 r r] /CS ENABLED WRITE: 0x80 READ: 0xC0 READ: 0x04 /CS DISABLED SPI> SPI>[0x81 r r] /CS ENABLED WRITE: 0x81 READ: 0xC0 READ: 0x04 /CS DISABLED SPI> SPI>[0x82 r r] /CS ENABLED WRITE: 0x82 READ: 0xFF READ: 0x00 /CS DISABLED SPI> SPI>[0x83 r r] /CS ENABLED WRITE: 0x83 READ: 0xC0 READ: 0x04 /CS DISABLED SPI> SPI>[0x84 r r] /CS ENABLED WRITE: 0x84 READ: 0xFE READ: 0x00 /CS DISABLED SPI> SPI>[0x85 r r] /CS ENABLED WRITE: 0x85 READ: 0xFE READ: 0x00 /CS DISABLED SPI> SPI>[0x86 r r] /CS ENABLED WRITE: 0x86 READ: 0xFF READ: 0x00 /CS DISABLED SPI> SPI>[0x87 r r] /CS ENABLED WRITE: 0x87 READ: 0xC0 READ: 0x04 /CS DISABLED SPI> SPI>[0x88 r r] /CS ENABLED WRITE: 0x88 READ: 0xFC READ: 0x00 /CS DISABLED SPI> SPI>[0x89 r r] /CS ENABLED WRITE: 0x89 READ: 0xFC READ: 0x00 /CS DISABLED SPI> SPI>[0xff r r] /CS ENABLED WRITE: 0xFF READ: 0x80 READ: 0x09 /CS DISABLED SPI> SPI>[0x01 0x00 0x1f] /CS ENABLED WRITE: 0x01 WRITE: 0x00 WRITE: 0x1F /CS DISABLED SPI> SPI>