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AFE7444EVM: wide bandwidth operation

SM
Expert 1730 points
Part Number: AFE7444EVM
Other Parts Discussed in Thread: AFE7444, , TSW14J57EVM

Hello,

    We downloaded the reference design to use the EVM with the KCU105.

The JESD interface is operated at 7.372Gbps and the corresponding DAC sampling rate is mentioned as 368.64MSps (limiting the signal BW to 180MHz). 

Our signal bandwidth is around 500MHz. 

May I ask you to please help us with the following:

1) What changes need to be done in the reference design to digitize a 500MHz BW signal and then reproduce the same using the DAC (as a first test). 

Regards,

  • 0
    TI__Genius 10505 points

    Hi SM,

    Different modes of operation of AFE7444 are shown in Table 172 of the datasheet. See snapshot below of the same.

    The KUC105 reference design is made for mode 6. For signal bandwidth of 500MHz, you can use mode 4 that supports upto 600MHz of bandwidth.

    You can follow below steps for this:

    1. To validate reference design, follow the KCU105 reference design user's guide to setup AFE7444EVM+KCU105 in mode 6. 

    2. To validate mode 4 operation, follow the AFE7444EVM user's guide and setup AFE7444EVM+TSW14J57EVM in mode 4.

    3. Modify FPGA code from reference design for KCU105 to operate in mode 4. (TI provides reference design in one mode as a starting point. We expect customers to modify FPGA code for their use-case mode)

    Regards,

    Vijay

  • 0 in reply to Vijayendra Varma Siddamsetty
    Expert 1730 points

    Hello Vijay,

                Thank you for the answer. What I also want to know is if you anticipate any issues in the KCU105 board + AFE7444 EVM combination when operating the JESD interface at 15Gbps. 

    We have a licensed version of Vivado 2018.2 and when we tried to open and upgrade the design to this version got the following error:

    • [BD 41-238] Port/Pin property FREQ_HZ does not match between /JesdSubSys/transport_layer_afe768x_44210_0/tx_link_clk(100000000) and /JesdSubSys/jesd204_phy/txoutclk(184320000.000)
    • [BD 41-927] Following properties on pin /JesdSubSys/leds_0/rst have been updated from connected ip. They may not be synchronized with cell properties. You can set property on pin directly to confirm the value and resolve the warning. POLARITY=ACTIVE_HIGH

    Please advise on how to fix this error or if you can provide a 2018.2 version of the project that will be extremely helpful,

    Thanks again,

  • 0 in reply to SM
    TI__Genius 10505 points

    Hi SM,

    AFE7444EVM works at 15Gbps (tested and proven with TSW14J57EVM). Theoretically, it should work at 15Gbps with KCU105 board as well. But we have not tested it. 

    Regarding the Vivado version error, I don't have the project in 2018.2 version. The project is created in version 2016.1. 

    Engineer who primarily supports AFE7444 is on vacation and is expected to be back next week. I'll inform him regarding this question. Please expect an answer an answer from him next week.

    Regards,

    Vijay

  • 0 in reply to Vijayendra Varma Siddamsetty
    TI__Expert 4880 points

    SM, 

    Unfortunately this firmware reference design is only available for the 2016.1 version of Viavado. 

    Yusuf