ADC32RF80EVM: Request a HSDC Pro ini File.

Have you tried with the regular INI (the one without "alternate") which is included with HSDC Pro? It's called "ADC32RF80_LMF_8821" and that should work. ADC32RF80_LMF_8821.ini

Hi Satish

We tested with ADC32RF80_LMF_8821.ini, but an error occurred as shown in the image below.

The setting of ADC32RF80EVM is as below image.

Please Check the this issue.

best regards.

Hi Louis,

The HSDC Pro error you showed is typically seen when the reference clock from ADC EVM to the TSW14J56 board is incorrect. The ADC EVM GUI shows that you are configuring it for internal clocking at 2457.6Msps and a DDC factor of 20x. That will result in an output data rate of 122.88Msps (2457.6/20). But in HSDC Pro data, the data rate is set to 307.2M which doesn't match.

Can you review the sampling clock frequency, DDC and output data rate to make sure they are consistent?    

Regards,

satish.

Hi satish

Thanks for your support.

I tested it with data rate of 122.88Msps, but the result was the same error.

When the DDC factor of 16x and ADC32RF80_LMF_8821.ini is used, it operates normally.

Could you test the DDC factor of 20x with ADC32RF80EVM?

Best regards

Hi Louis,

I've tested this mode on my bench earlier and it had worked without any issues. The issue here is probably incorrect FPGA reference clock frequency. You can rule this out by clicking on the "LMK04828" tab in the GUI and checking the "DCLK Divider" under the "CLKout 0 and 1" group. You must check this after programming the EVM. The LMK VCO frequency divided by this number should match the reference clock frequency expected by the TSW14J56 board. The expected frequency is shown on a pop-message in HSDC Pro when you configure the ADC tab of HSDC Pro.

In your screenshots, you seem to be using an external clock source to clock the ADCEVM. In that case, you'll also have to provide a copy of the ADC clock to LMK (SMAs J5 and J7).

I'll test again on my bench when I get a chance.

regards,

satish.