Hello,
we have to develop an application which involves capacity measurement at high speed.
The desired speed is at least 1 frequency sample every ms.
The capacity to be measured ranges (roughly) from 0.25 pF to 1 pF.
Having to perform quick measurements, we preferred FDC2112 (12 to 16 bit) over the 28 bit chips, because we have not time to perform longer and more accurate measurements.
A careful reading of your FDC2112 datasheet reveals some discrepancies or undefined quantities that make difficult to undestand which can be the performance in terms of speed.
At page 17, it can be found : " 1.8ms (sensor-activation time) + 3.2ms (conversion time) + 0.75ms (channel-switch delay) = 16.75ms" probably there is some typo because 1.8+3.2+0.75 = 5.75 and not 16.75.
The value of Fref in this example was never mentioned in the document; taking the 3.2 ms value and according to the document which reports that this conversion time is due to 8192 clock cycles of Fref, it seems that Fref is 2.56 MHz. Is it true ? If wrong, can you explain the criterion?
We did non crearly understand the choice criterion of the resonant circuit recommended, with 18 uH in parallel with 33 pF.
why not , for example, 54 uH with 11 pF ? It should be have better sensitivity having greater (capacitance variation)/ (total capacitance). Perhaps the choice recommended is for S/N optimizing ?
Thanks, Vasco