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OPT9221 Master Serial Configuretion?

Other Parts Discussed in Thread: OPT9221, OPT8241

Hi Ti,

    I have quenstion about OPT9221 Master Serial Configuretion,pls see the follow:

   Q1:In OPT9221 Datasheet Page 40,figure 17,we can see opt9221's INIT_DONE Pin is pull up to VCCIO8 by 10K resistance,but in the OPT8241_EVM_CDK

sch file,i find this pin not do this,it is all right?

   Q2: the Configure RRPROM is SPI Flash,i want to konw,How much frequency about opt9221's TIC_CLK Pin?

  Thanks & Best Wishes.

   None

  • A1 : On OPT8241 CDK, I2C transactions are being used to check if OPT9221 is alive. Therefore, INIT_DONE pin is not used in OPT8241-CDK. If INIT_DONE is used, it is recommended to use it as per the guidelines in the datasheet.
    A2 : Very good question! We will state it explicitly in the next revision of datasheet. the max clock frequency used for reading the SPI flash is 40MHz.

    Regards
    Bharath
  • Hi Bharath,

    Thanks for you reply.

    for A1:I am also have question,From OPT9221 Datasheet page 9,the TIC_INIT_Done is used to indicate end of TFC initialization,

    I want to know which module will be initialize by TFC,what else except for DDR2?

    for A2: the max clock frequency used for reading the SPI flash is 40MHz,how about the clock frequency in opreation mode? it should be less than 40MHz.

    Thanks&Regards

    None
  • Hi Bharath,

    if you convenient,please help me solve the above question.

    Thanks&Regards

    None
  • Hi None,

    for A1: INIT_DONE is only to indicate the completion of the internal initialization of the OPT9221 after firmware load and indicates that the OPT9221 is now ready to respond on the I2C interface. No external module initialization is done. OPT9221 still requires an external reset to be done followed by register programming as required.

    for A2: the SPI EEPROM is only accessed for the OPT9221 boot firmware at startup, and it is not accessed at any other time. So the 40 MHz clock frequency only applies at startup.

    Best Regards,
    Anand
  • Hi Anand,

    Thanks for you reply.

    for A1: I have two question:

    Q1:if there is no external module initialization is done by the OPT9221, How DDR2 works? i am not find any register to makes it work?
    maybe setting TG_DIS to '0' make DDR2 Work?

    Q2:"OPT9221 still requires an external reset to be done followed by register programming as required." I am not understand its means. I am just say my understand point about this sentence: we should reset the OPT9221 at first,and then start setting register programming as required,what i say,it is not like you said,all right?

    Thanks&Regards.

    None

  • Hi,

    Your understanding is right. Register programming is done after reset. There is not need to write registers for DDR configuration. You can read the ddr_calibration_flag and the ddr_controller_flag to check the DDR init status. If they are set to '1', that means DDR has already been initialized and OPT9221 is able to interface properly with the DDR.

    Regards
    Bharath
  • Hi

    I have a doubt about the firmware load of the TFC.

    I have disabled the FX2 and trying to control the TFC with my own micro.

    The OPT9221 in the CDK is configured in master mode, right? So, it should automatically load the firmware from the EEPROM when it starts?

    I see activity in the TIC_MISO, TIC_MOSI pins but no activity in the blue led indicating that the TFC booted.

    Thanks

  • Hi Cesar,

    The CDK Borad is configured in master mode.

    for you own micro,you should use the control signal: TIC_CEz&TIC_CONFIGZ.please read the OPT9221 Datasheet page 39.

    thanks&regards

    None
  • Hi None


    Thanks for your reply

    In page 39 of the datasheet says: "For programming the EEPROM, the TIC_CONFIGZ pin has to be pulled low and TIC_CEz has to be pulled high".

    I assume that with TIC_CONFIGZ high and TIC_CEZ low the OPT9221 should load the program. I have cheked those two pins and I have CONFIGZ high and CEZ low, but the OPT9221 does not boot.

    Checking the board on my own, the problem seems to be that the 48 MHz clock that I generate with my own microcontroller does not reach to the OPT9221 with the corresponding level. If I modify this clock to 24 MHz, the TFC boots, but according to its datasheet it has to work in 48 MHz. I found out that feeding the TFC with a 12 MHz clk and setting the SYSCLK_IN_FREQ parameter in 0x5C;0x33 register I can get the OPT to boot, but then the led turns off and I can´t get output info.

    At this ponit, is it probable that the problem is the register config?

    Thanks

    César

  • Hi Cesar,

    Sorry, I don't know why to this.but you can do a experiment with TI CDK borad.

    the system clk for opt9221 is generate by fx2 pll,you can set the fx2 PLL out singal to 24Meg.

    if this sucess,it will be the other probelm.

    Thanks&Regards.

    None
  • Hi None

    Finally, I could boot the OPT9221 and set all the registers. To begin, I am using the phy_test in order to get known and fixed data. But after approximately one minute, only reading, the data stops, but not always in the same way:

    - Sometimes just the tg_dis bit turns to one.

    - Sometimes the TFC boot led turns off and the I2C of the TFC does not respond.

    In order to restore the data I have to just reset the TFC but sometimes it is necessary for me to also reset the PMIC.

    There are many alternatives here, but for now the question is: Do I need to be always setting any of the OPT9221 registers in order to keep it alive? Or should it work continuously without any setting via I2C?

    Thanks

    César

  • Hi Cesar,

         maybe you can reference this procedure when setting registers.

         

         thanks&regards.

         None