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TMP100: what happens when the V+ Voltage drops during a Fault, Short Circuit or high current Latchup condition

Michael T Schneider
Expert 3780 points
Part Number: TMP100

 3.3V source supply’s a 10 Ohm series resistor suppling the TMP100 V+ pin. Additionally a 0.01uF capacitor and 0.1uF capacitor connects to the V+ pin and GND.

 We are analyzing single point failures on the design and need to thoroughly understand how the TMP100 operates during worst case high current conditions in to the V+ pin.

The TMP100 Data sheet, Absolute Maximum ratings on page 4, do not show the maximum current through the V+ pin.

What is the “maximum current” that could flow through the V+ pin under a Latch-up, Fault or Short circuit condition?

 

On page 5, Power Supply section, the data sheet only lists Quiescent and Shutdown currents. The same for Figure 5.

What is the worst case “Short Circuit”, “Fault Current” or “Latchup Current” that could flow through the V+ pin?

 

Again, the data sheet has no information detailing what happens when the V+ Voltage drops during a Fault, Short Circuit or high current Latchup condition.

 

How does the part operate and recover under Fault, Latch-up or Short-circuit conditions with regards to the V+ pin?

  • 0
    TI__Expert 6135 points

    Hi Michael,

    We do not have a spec for the maximum ratings for input current through the V+ pin.

    However, section 8.2.1 of the datasheet mentions not to exceed 3mA of current on the SCL and SDA pins and 4mA of current on the ALERT pin.

    Best regards,

    Jesse

  • 0 in reply to Jesse Baker
    TI__Expert 3780 points

    Jesse, Thank you for the data for the SCL and SDA pins as well as the ALERT pin. 

    is there a way we can speak to the design team to ensure we understand Worst Case behavior of the V+ pin? not knowing this information will result in my customer not being able to use the device. 

  • 0 in reply to Michael T Schneider
    TI__Expert 6135 points

    Hi Michael,

    We're interfacing with the design team to look into the latch-up condition. Regarding the other conditions:

    - For the short to ground at the supply pin, all the current would go through the 10 ohm resistor to ground.

    - For the fault condition, the voltage at V+ can't exceed the absolute maximum rating of 7.5 V in section 6.1 of the datasheet.

    Also, we don't recommend putting a resistor in line with the supply pin, just a bypass capacitor as shown in layout example.

    Best regards,

    Jesse

  • 0 in reply to Michael T Schneider
    TI__Mastermind 35895 points

    Hi Michael,

    Let me try to address some of your requests:

    1. You mentioned a voltage drop. We cannot guarantee correct operation of the device below the min operating voltage (2.7V.)
    2. Regarding high current, we have an absolute maximum voltage spec of 7.5V. This voltage limit comes from the process technology, because there is a risk of break down beyond it. If high current is being forced into our device, it would appear as an increasing voltage until damage occurs. 
    3. We don't have a valid operating mode that would draw high current. The SDA pin is the only output on TMP100, and it is only specified to handle 3mA current sink. This SDA current would come from another source and flow to GND through TMP100. In other words, it would not be part of TMP100's supply current. Excessive supply current (as defined by our Iq specifications) would be an indication of a damaged TMP100. We cannot provide guidance or speculation for a damaged device's behavior.
    4. Regarding Latch-Up, TMP100 passed industry standard JESD78 testing in order to qualify it for release to market. Please see https://www.ti.com/qualificationsummary/qualsumm/home?actionId=2800

    thanks,

    ren